معرفی شرکت ها


microcode_ctl-2.1-73.16.el7_9.x86_64.rpm


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مشتریان به طور فزاینده ای آنلاین هستند. تبلیغات می تواند به آنها کمک کند تا کسب و کار شما را پیدا کنند.

مشاهده بیشتر
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تبلیغات ما

مشتریان به طور فزاینده ای آنلاین هستند. تبلیغات می تواند به آنها کمک کند تا کسب و کار شما را پیدا کنند.

مشاهده بیشتر
Card image cap
تبلیغات ما

مشتریان به طور فزاینده ای آنلاین هستند. تبلیغات می تواند به آنها کمک کند تا کسب و کار شما را پیدا کنند.

مشاهده بیشتر
Card image cap
تبلیغات ما

مشتریان به طور فزاینده ای آنلاین هستند. تبلیغات می تواند به آنها کمک کند تا کسب و کار شما را پیدا کنند.

مشاهده بیشتر

توضیحات

Tool to transform and deploy CPU microcode update for x86.
ویژگی مقدار
سیستم عامل Linux
توزیع CentOS 7
مخزن Centos updates x86_64
نام بسته microcode_ctl
نام فایل بسته microcode_ctl-2.1-73.16.el7_9.x86_64.rpm
نسخه بسته 2.1
انتشار بسته 73.16.el7_9
معماری بسته x86_64
نگهدارنده -
تاریخ ساخت Wed 23 Aug 2023 06
هاست سازنده x86-01.bsys.centos.org
نوع بسته .rpm
آدرس صفحه اصلی https://pagure.io/microcode_ctl
مجوز GPLv2+ and Redistributable, no modification permitted
حجم دانلود 6.6M
حجم نصب 12.152M
The microcode_ctl utility is a companion to the microcode driver written by Tigran Aivazian <tigran@aivazian.fsnet.co.uk>. The microcode update is volatile and needs to be uploaded on each system boot i.e. it doesn't reflash your cpu permanently, reboot and it reverts back to the old microcode.


جایگزین ها

بسته نسخه معماری مخزن
microcode_ctl-2.1-73.el7.x86_64.rpm 2.1 x86_64 CentOS os
microcode_ctl-2.1-73.11.el7_9.x86_64.rpm 2.1 x86_64 CentOS updates
microcode_ctl-2.1-73.14.el7_9.x86_64.rpm 2.1 x86_64 CentOS updates
microcode_ctl-2.1-73.15.el7_9.x86_64.rpm 2.1 x86_64 CentOS updates
microcode_ctl-2.1-73.4.el7_9.x86_64.rpm 2.1 x86_64 CentOS updates
microcode_ctl-2.1-73.2.el7_9.x86_64.rpm 2.1 x86_64 CentOS updates
microcode_ctl-2.1-73.13.el7_9.x86_64.rpm 2.1 x86_64 CentOS updates
microcode_ctl-2.1-73.9.el7_9.x86_64.rpm 2.1 x86_64 CentOS updates
microcode_ctl-2.1-73.8.el7_9.x86_64.rpm 2.1 x86_64 CentOS updates
microcode_ctl-2.1-23.3.atomic.el7.x86_64.rpm 2.1 x86_64 CentOS atomic


نیازمندی

مقدار نام
- coreutils
- systemd
- coreutils
- systemd
- coreutils
- systemd
- coreutils
- dracut
- coreutils
- /bin/sh
- /bin/sh
- /bin/sh
- /bin/sh
- /bin/sh
- /bin/bash
- libc.so.6()(64bit)
- libc.so.6(GLIBC_2.2.5)(64bit)
- libc.so.6(GLIBC_2.3.4)(64bit)
- libc.so.6(GLIBC_2.4)(64bit)
- libc.so.6(GLIBC_2.8)(64bit)


ارائه دهنده

مقدار نام
= 2:2.1-73.16.el7_9 microcode_ctl
= 2:2.1-73.16.el7_9 microcode_ctl(x86-64)
= 0x2 firmware(intel-ucode/06-03-02)
= 0x40 firmware(intel-ucode/06-05-00)
= 0x41 firmware(intel-ucode/06-05-00)
= 0x45 firmware(intel-ucode/06-05-00)
= 0x40 firmware(intel-ucode/06-05-01)
= 0x2a firmware(intel-ucode/06-05-02)
= 0x2b firmware(intel-ucode/06-05-02)
= 0x2c firmware(intel-ucode/06-05-02)
= 0x10 firmware(intel-ucode/06-05-03)
= 0xb firmware(intel-ucode/06-05-03)
= 0xc firmware(intel-ucode/06-05-03)
= 0xd firmware(intel-ucode/06-05-03)
= 0xa firmware(intel-ucode/06-06-00)
= 0x3 firmware(intel-ucode/06-06-05)
= 0xb firmware(intel-ucode/06-06-0a)
= 0xc firmware(intel-ucode/06-06-0a)
= 0xd firmware(intel-ucode/06-06-0a)
= 0x5 firmware(intel-ucode/06-06-0d)
= 0x6 firmware(intel-ucode/06-06-0d)
= 0x7 firmware(intel-ucode/06-06-0d)
= 0x14 firmware(intel-ucode/06-07-01)
= 0x38 firmware(intel-ucode/06-07-02)
= 0x2e firmware(intel-ucode/06-07-03)
= 0x10 firmware(intel-ucode/06-08-01)
= 0x11 firmware(intel-ucode/06-08-01)
= 0xd firmware(intel-ucode/06-08-01)
= 0xe firmware(intel-ucode/06-08-01)
= 0xf firmware(intel-ucode/06-08-01)
= 0x7 firmware(intel-ucode/06-08-03)
= 0x8 firmware(intel-ucode/06-08-03)
= 0x2 firmware(intel-ucode/06-08-06)
= 0x7 firmware(intel-ucode/06-08-06)
= 0x8 firmware(intel-ucode/06-08-06)
= 0xa firmware(intel-ucode/06-08-06)
= 0xc firmware(intel-ucode/06-08-06)
= 0x1 firmware(intel-ucode/06-08-0a)
= 0x4 firmware(intel-ucode/06-08-0a)
= 0x5 firmware(intel-ucode/06-08-0a)
= 0x47 firmware(intel-ucode/06-09-05)
= 0x7 firmware(intel-ucode/06-09-05)
= 0x3 firmware(intel-ucode/06-0a-00)
= 0x1 firmware(intel-ucode/06-0a-01)
= 0x1c firmware(intel-ucode/06-0b-01)
= 0x1d firmware(intel-ucode/06-0b-01)
= 0x1 firmware(intel-ucode/06-0b-04)
= 0x2 firmware(intel-ucode/06-0b-04)
= 0x18 firmware(intel-ucode/06-0d-06)
= 0x39 firmware(intel-ucode/06-0e-08)
= 0x54 firmware(intel-ucode/06-0e-0c)
= 0x59 firmware(intel-ucode/06-0e-0c)
= 0x5c firmware(intel-ucode/06-0f-02)
= 0x5d firmware(intel-ucode/06-0f-02)
= 0xd0 firmware(intel-ucode/06-0f-06)
= 0xd1 firmware(intel-ucode/06-0f-06)
= 0xd2 firmware(intel-ucode/06-0f-06)
= 0x6a firmware(intel-ucode/06-0f-07)
= 0x6b firmware(intel-ucode/06-0f-07)
= 0x95 firmware(intel-ucode/06-0f-0a)
= 0xba firmware(intel-ucode/06-0f-0b)
= 0xbb firmware(intel-ucode/06-0f-0b)
= 0xbc firmware(intel-ucode/06-0f-0b)
= 0xa4 firmware(intel-ucode/06-0f-0d)
= 0x42 firmware(intel-ucode/06-16-01)
= 0x43 firmware(intel-ucode/06-16-01)
= 0x44 firmware(intel-ucode/06-16-01)
= 0x60f firmware(intel-ucode/06-17-06)
= 0x70a firmware(intel-ucode/06-17-07)
= 0xa0b firmware(intel-ucode/06-17-0a)
= 0x12 firmware(intel-ucode/06-1a-04)
= 0x1d firmware(intel-ucode/06-1a-05)
= 0x217 firmware(intel-ucode/06-1c-02)
= 0x218 firmware(intel-ucode/06-1c-02)
= 0x219 firmware(intel-ucode/06-1c-02)
= 0x107 firmware(intel-ucode/06-1c-0a)
= 0x29 firmware(intel-ucode/06-1d-01)
= 0xa firmware(intel-ucode/06-1e-05)
= 0x11 firmware(intel-ucode/06-25-02)
= 0x7 firmware(intel-ucode/06-25-05)
= 0x104 firmware(intel-ucode/06-26-01)
= 0x105 firmware(intel-ucode/06-26-01)
= 0x2f firmware(intel-ucode/06-2a-07)
= 0x1f firmware(intel-ucode/06-2c-02)
= 0x621 firmware(intel-ucode/06-2d-06)
= 0x714 firmware(intel-ucode/06-2d-07)
= 0x71a firmware(intel-ucode/06-2d-07)
= 0xd firmware(intel-ucode/06-2e-06)
= 0x3b firmware(intel-ucode/06-2f-02)
= 0x838 firmware(intel-ucode/06-37-08)
= 0x90d firmware(intel-ucode/06-37-09)
= 0x21 firmware(intel-ucode/06-3a-09)
= 0x28 firmware(intel-ucode/06-3c-03)
= 0x2f firmware(intel-ucode/06-3d-04)
= 0x42e firmware(intel-ucode/06-3e-04)
= 0x600 firmware(intel-ucode/06-3e-06)
= 0x715 firmware(intel-ucode/06-3e-07)
= 0x49 firmware(intel-ucode/06-3f-02)
= 0x1a firmware(intel-ucode/06-3f-04)
= 0x26 firmware(intel-ucode/06-45-01)
= 0x1c firmware(intel-ucode/06-46-01)
= 0x22 firmware(intel-ucode/06-47-01)
= 0x368 firmware(intel-ucode/06-4c-03)
= 0x411 firmware(intel-ucode/06-4c-04)
= 0x12d firmware(intel-ucode/06-4d-08)
= 0xd6 firmware(intel-ucode/06-4e-03)
= 0xf0 firmware(intel-ucode/06-4e-03)
= 0xb000040 firmware(intel-ucode/06-4f-01)
= 0x1000161 firmware(intel-ucode/06-55-03)
= 0x2000064 firmware(intel-ucode/06-55-04)
= 0x2006e05 firmware(intel-ucode/06-55-04)
= 0x3000010 firmware(intel-ucode/06-55-05)
= 0x4003303 firmware(intel-ucode/06-55-06)
= 0x5003303 firmware(intel-ucode/06-55-07)
= 0x7002503 firmware(intel-ucode/06-55-0b)
= 0x1c firmware(intel-ucode/06-56-02)
= 0x700001c firmware(intel-ucode/06-56-03)
= 0xf00001a firmware(intel-ucode/06-56-04)
= 0xe000014 firmware(intel-ucode/06-56-05)
= 0x14 firmware(intel-ucode/06-5c-02)
= 0x48 firmware(intel-ucode/06-5c-09)
= 0x28 firmware(intel-ucode/06-5c-0a)
= 0xd6 firmware(intel-ucode/06-5e-03)
= 0xf0 firmware(intel-ucode/06-5e-03)
= 0x38 firmware(intel-ucode/06-5f-01)
= 0x2a firmware(intel-ucode/06-66-03)
= 0xc0002f0 firmware(intel-ucode/06-6a-05)
= 0xd000389 firmware(intel-ucode/06-6a-06)
= 0x1000211 firmware(intel-ucode/06-6c-01)
= 0x3e firmware(intel-ucode/06-7a-01)
= 0x22 firmware(intel-ucode/06-7a-08)
= 0xb8 firmware(intel-ucode/06-7e-05)
= 0x32 firmware(intel-ucode/06-8a-01)
= 0xa6 firmware(intel-ucode/06-8c-01)
= 0x28 firmware(intel-ucode/06-8c-02)
= 0x42 firmware(intel-ucode/06-8d-01)
= 0xf0 firmware(intel-ucode/06-8e-09)
= 0xf0 firmware(intel-ucode/06-8e-0a)
= 0xf0 firmware(intel-ucode/06-8e-0b)
= 0xf4 firmware(intel-ucode/06-8e-0c)
= 0x2b000181 firmware(intel-ucode/06-8f-04)
= 0x2c000170 firmware(intel-ucode/06-8f-04)
= 0x2b000181 firmware(intel-ucode/06-8f-05)
= 0x2c000170 firmware(intel-ucode/06-8f-05)
= 0x2b000181 firmware(intel-ucode/06-8f-06)
= 0x2c000170 firmware(intel-ucode/06-8f-06)
= 0x2b000181 firmware(intel-ucode/06-8f-07)
= 0x2b000181 firmware(intel-ucode/06-8f-08)
= 0x2c000170 firmware(intel-ucode/06-8f-08)
= 0x17 firmware(intel-ucode/06-96-01)
= 0x2c firmware(intel-ucode/06-97-02)
= 0x2c firmware(intel-ucode/06-97-05)
= 0x429 firmware(intel-ucode/06-9a-03)
= 0x429 firmware(intel-ucode/06-9a-04)
= 0x24000024 firmware(intel-ucode/06-9c-00)
= 0xf0 firmware(intel-ucode/06-9e-09)
= 0xf0 firmware(intel-ucode/06-9e-0a)
= 0xf0 firmware(intel-ucode/06-9e-0b)
= 0xf0 firmware(intel-ucode/06-9e-0c)
= 0xf4 firmware(intel-ucode/06-9e-0d)
= 0xf4 firmware(intel-ucode/06-a5-02)
= 0xf4 firmware(intel-ucode/06-a5-03)
= 0xf4 firmware(intel-ucode/06-a5-05)
= 0xf4 firmware(intel-ucode/06-a6-00)
= 0xf4 firmware(intel-ucode/06-a6-01)
= 0x57 firmware(intel-ucode/06-a7-01)
= 0x112 firmware(intel-ucode/06-b7-01)
= 0x410e firmware(intel-ucode/06-ba-02)
= 0x410e firmware(intel-ucode/06-ba-03)
= 0x2c firmware(intel-ucode/06-bf-02)
= 0x2c firmware(intel-ucode/06-bf-05)
= 0x12 firmware(intel-ucode/0f-00-07)
= 0x8 firmware(intel-ucode/0f-00-07)
= 0x13 firmware(intel-ucode/0f-00-0a)
= 0x14 firmware(intel-ucode/0f-00-0a)
= 0x15 firmware(intel-ucode/0f-00-0a)
= 0x2e firmware(intel-ucode/0f-01-02)
= 0x1e firmware(intel-ucode/0f-02-04)
= 0x1f firmware(intel-ucode/0f-02-04)
= 0x21 firmware(intel-ucode/0f-02-04)
= 0x29 firmware(intel-ucode/0f-02-05)
= 0x2a firmware(intel-ucode/0f-02-05)
= 0x2b firmware(intel-ucode/0f-02-05)
= 0x2c firmware(intel-ucode/0f-02-05)
= 0x10 firmware(intel-ucode/0f-02-06)
= 0x37 firmware(intel-ucode/0f-02-07)
= 0x38 firmware(intel-ucode/0f-02-07)
= 0x39 firmware(intel-ucode/0f-02-07)
= 0x2d firmware(intel-ucode/0f-02-09)
= 0x2e firmware(intel-ucode/0f-02-09)
= 0x2f firmware(intel-ucode/0f-02-09)
= 0xa firmware(intel-ucode/0f-03-02)
= 0xc firmware(intel-ucode/0f-03-03)
= 0x17 firmware(intel-ucode/0f-03-04)
= 0x16 firmware(intel-ucode/0f-04-01)
= 0x17 firmware(intel-ucode/0f-04-01)
= 0x5 firmware(intel-ucode/0f-04-03)
= 0x6 firmware(intel-ucode/0f-04-04)
= 0x3 firmware(intel-ucode/0f-04-07)
= 0x7 firmware(intel-ucode/0f-04-08)
= 0xc firmware(intel-ucode/0f-04-08)
= 0xe firmware(intel-ucode/0f-04-08)
= 0x3 firmware(intel-ucode/0f-04-09)
= 0x2 firmware(intel-ucode/0f-04-0a)
= 0x4 firmware(intel-ucode/0f-04-0a)
= 0xf firmware(intel-ucode/0f-06-02)
= 0x2 firmware(intel-ucode/0f-06-04)
= 0x4 firmware(intel-ucode/0f-06-04)
= 0x8 firmware(intel-ucode/0f-06-05)
= 0x9 firmware(intel-ucode/0f-06-08)
= 1998.06.10 iucode_date(fname:intel/06-03-02;cpuid:00001632;pf_mask:0x0)
= 1999.05.25 iucode_date(fname:intel/06-05-00;cpuid:00000650;pf_mask:0x1)
= 1999.05.25 iucode_date(fname:intel/06-05-00;cpuid:00000650;pf_mask:0x1;segment:"Desktop";codename:"Deschutes_SEPP_[PII]";stepping:"A0";pf_model:0x1)
= 1999.05.25 iucode_date(fname:intel/06-05-00;cpuid:00000650;pf_mask:0x2)
= 1999.05.25 iucode_date(fname:intel/06-05-00;cpuid:00000650;pf_mask:0x2;segment:"Mobile";codename:"Deschutes_Mini-Cart_[PII]";stepping:"A0";pf_model:0x2)
= 1999.05.25 iucode_date(fname:intel/06-05-00;cpuid:00000650;pf_mask:0x8)
= 1999.05.25 iucode_date(fname:intel/06-05-00;cpuid:00000650;pf_mask:0x8;segment:"Mobile";codename:"Deschutes_MMC1/MMC2_[PII]";stepping:"A0";pf_model:0x8)
= 1999.05.25 iucode_date(fname:intel/06-05-01;cpuid:00000651;pf_mask:0x1)
= 1999.05.25 iucode_date(fname:intel/06-05-01;cpuid:00000651;pf_mask:0x1;segment:"Desktop";codename:"Deschutes_SECC/SECC2_[PII]";stepping:"A1";pf_model:0x1)
= 1999.05.25 iucode_date(fname:intel/06-05-01;cpuid:00000651;pf_mask:0x1;segment:"Desktop";codename:"Deschutes_SEPP_[PII]";stepping:"A1";pf_model:0x1)
= 1999.05.12 iucode_date(fname:intel/06-05-02;cpuid:00000652;pf_mask:0x1)
= 1999.05.12 iucode_date(fname:intel/06-05-02;cpuid:00000652;pf_mask:0x1;segment:"Desktop";codename:"Deschutes_SECC/SECC2_[PII]";stepping:"B0";pf_model:0x1)
= 1999.05.17 iucode_date(fname:intel/06-05-02;cpuid:00000652;pf_mask:0x2)
= 1999.05.17 iucode_date(fname:intel/06-05-02;cpuid:00000652;pf_mask:0x2;segment:"Mobile";codename:"Deschutes_Mini-Cart_[PII]";stepping:"B0";pf_model:0x2)
= 1999.05.12 iucode_date(fname:intel/06-05-02;cpuid:00000652;pf_mask:0x4)
= 1999.05.12 iucode_date(fname:intel/06-05-02;cpuid:00000652;pf_mask:0x4;segment:"Server";codename:"Deschutes_SECC_[PII]";stepping:"B0";pf_model:0x4)
= 1999.06.28 iucode_date(fname:intel/06-05-03;cpuid:00000653;pf_mask:0x1)
= 1999.06.28 iucode_date(fname:intel/06-05-03;cpuid:00000653;pf_mask:0x1;segment:"Desktop";codename:"Deschutes_SECC/SECC2_[PII]";stepping:"B1";pf_model:0x1)
= 1999.05.18 iucode_date(fname:intel/06-05-03;cpuid:00000653;pf_mask:0x2)
= 1999.05.18 iucode_date(fname:intel/06-05-03;cpuid:00000653;pf_mask:0x2;segment:"Mobile";codename:"Deschutes_Mini-Cart_[PII]";stepping:"B1";pf_model:0x2)
= 1999.05.20 iucode_date(fname:intel/06-05-03;cpuid:00000653;pf_mask:0x4)
= 1999.05.20 iucode_date(fname:intel/06-05-03;cpuid:00000653;pf_mask:0x4;segment:"Server";codename:"Deschutes_SECC_[PII]";stepping:"B1";pf_model:0x4)
= 1999.05.18 iucode_date(fname:intel/06-05-03;cpuid:00000653;pf_mask:0x8)
= 1999.05.18 iucode_date(fname:intel/06-05-03;cpuid:00000653;pf_mask:0x8;segment:"Mobile";codename:"Deschutes_MMC1/MMC2_[PII]";stepping:"B1";pf_model:0x8)
= 1999.05.05 iucode_date(fname:intel/06-06-00;cpuid:00000660;pf_mask:0x1)
= 1999.05.05 iucode_date(fname:intel/06-06-00;cpuid:00000660;pf_mask:0x1;segment:"Desktop";codename:"Mendocino_SEPP_[PII]";stepping:"A0";pf_model:0x1)
= 1999.05.05 iucode_date(fname:intel/06-06-05;cpuid:00000665;pf_mask:0x10)
= 1999.05.05 iucode_date(fname:intel/06-06-05;cpuid:00000665;pf_mask:0x10;segment:"Desktop";codename:"Mendocino_PPGA_[PII]";stepping:"B0";pf_model:0x10)
= 1999.05.05 iucode_date(fname:intel/06-06-0a;cpuid:0000066a;pf_mask:0x20)
= 1999.05.05 iucode_date(fname:intel/06-06-0a;cpuid:0000066a;pf_mask:0x20;segment:"Mobile";codename:"Dixon_Micro-PGA1_[PII]";stepping:"A1";pf_model:0x20)
= 1999.05.05 iucode_date(fname:intel/06-06-0a;cpuid:0000066a;pf_mask:0x2)
= 1999.05.05 iucode_date(fname:intel/06-06-0a;cpuid:0000066a;pf_mask:0x2;segment:"Mobile";codename:"Dixon_Mini-Cart_[PII]";stepping:"A1";pf_model:0x2)
= 1999.05.05 iucode_date(fname:intel/06-06-0a;cpuid:0000066a;pf_mask:0x8)
= 1999.05.05 iucode_date(fname:intel/06-06-0a;cpuid:0000066a;pf_mask:0x8;segment:"Mobile";codename:"Dixon_MMC1/MMC2_[PII]";stepping:"A1";pf_model:0x8)
= 1999.05.05 iucode_date(fname:intel/06-06-0d;cpuid:0000066d;pf_mask:0x20)
= 1999.05.05 iucode_date(fname:intel/06-06-0d;cpuid:0000066d;pf_mask:0x20;segment:"Mobile";codename:"Dixon_Micro-PGA1_[PII]";stepping:"A1";pf_model:0x20)
= 1999.03.12 iucode_date(fname:intel/06-06-0d;cpuid:0000066d;pf_mask:0x2)
= 1999.03.12 iucode_date(fname:intel/06-06-0d;cpuid:0000066d;pf_mask:0x2;segment:"Mobile";codename:"Dixon_Mini-Cart_[PII]";stepping:"A1";pf_model:0x2)
= 1999.03.12 iucode_date(fname:intel/06-06-0d;cpuid:0000066d;pf_mask:0x8)
= 1999.03.12 iucode_date(fname:intel/06-06-0d;cpuid:0000066d;pf_mask:0x8;segment:"Mobile";codename:"Dixon_MMC1/MMC2_[PII]";stepping:"A1";pf_model:0x8)
= 1998.08.11 iucode_date(fname:intel/06-07-01;cpuid:00000671;pf_mask:0x4)
= 1998.08.11 iucode_date(fname:intel/06-07-01;cpuid:00000671;pf_mask:0x4;segment:"Server";codename:"Tanner_SECC_[PIII]";stepping:"B0";pf_model:0x4)
= 1999.09.22 iucode_date(fname:intel/06-07-02;cpuid:00000672;pf_mask:0x4)
= 1999.09.22 iucode_date(fname:intel/06-07-02;cpuid:00000672;pf_mask:0x4;segment:"Server";codename:"Tanner_SECC_[PIII]";stepping:"B0";pf_model:0x4)
= 1999.09.10 iucode_date(fname:intel/06-07-03;cpuid:00000673;pf_mask:0x4)
= 1999.09.10 iucode_date(fname:intel/06-07-03;cpuid:00000673;pf_mask:0x4;segment:"Server";codename:"Tanner_SECC_[PIII]";stepping:"C0";pf_model:0x4)
= 1999.09.21 iucode_date(fname:intel/06-08-01;cpuid:00000681;pf_mask:0x10)
= 1999.09.21 iucode_date(fname:intel/06-08-01;cpuid:00000681;pf_mask:0x10;segment:"Desktop";codename:"Coppermine_FC-PGA_[PIII]";stepping:"A2";pf_model:0x10)
= 1999.09.21 iucode_date(fname:intel/06-08-01;cpuid:00000681;pf_mask:0x1)
= 1999.09.21 iucode_date(fname:intel/06-08-01;cpuid:00000681;pf_mask:0x1;segment:"Desktop";codename:"Coppermine_SECC/SECC2_[PIII]";stepping:"A2";pf_model:0x1)
= 1999.09.21 iucode_date(fname:intel/06-08-01;cpuid:00000681;pf_mask:0x20)
= 1999.09.21 iucode_date(fname:intel/06-08-01;cpuid:00000681;pf_mask:0x20;segment:"Mobile";codename:"Coppermine_Micro-PGA2_[PIII]";stepping:"A2";pf_model:0x20)
= 1999.09.21 iucode_date(fname:intel/06-08-01;cpuid:00000681;pf_mask:0x4)
= 1999.09.21 iucode_date(fname:intel/06-08-01;cpuid:00000681;pf_mask:0x4;segment:"Server";codename:"Cascades_SECC_[PIII]";stepping:"A2";pf_model:0x4)
= 1999.09.21 iucode_date(fname:intel/06-08-01;cpuid:00000681;pf_mask:0x8)
= 1999.09.21 iucode_date(fname:intel/06-08-01;cpuid:00000681;pf_mask:0x8;segment:"Mobile";codename:"Coppermine_MMC2_[PIII]";stepping:"A2";pf_model:0x8)
= 1999.10.15 iucode_date(fname:intel/06-08-03;cpuid:00000683;pf_mask:0x20)
= 1999.10.15 iucode_date(fname:intel/06-08-03;cpuid:00000683;pf_mask:0x20;segment:"Mobile";codename:"Coppermine_Micro-PGA2_[PIII]";stepping:"B0";pf_model:0x20)
= 1999.10.15 iucode_date(fname:intel/06-08-03;cpuid:00000683;pf_mask:0x8)
= 1999.10.15 iucode_date(fname:intel/06-08-03;cpuid:00000683;pf_mask:0x8;segment:"Mobile";codename:"Coppermine_MMC2_[PIII]";stepping:"B0";pf_model:0x8)
= 2000.05.05 iucode_date(fname:intel/06-08-06;cpuid:00000686;pf_mask:0x10)
= 2000.05.05 iucode_date(fname:intel/06-08-06;cpuid:00000686;pf_mask:0x10;segment:"Desktop";codename:"Coppermine_FC-PGA_[PIII]";stepping:"C0";pf_model:0x10)
= 2000.05.05 iucode_date(fname:intel/06-08-06;cpuid:00000686;pf_mask:0x1)
= 2000.05.05 iucode_date(fname:intel/06-08-06;cpuid:00000686;pf_mask:0x1;segment:"Desktop";codename:"Coppermine_SECC/SECC2_[PIII]";stepping:"C0";pf_model:0x1)
= 2000.05.04 iucode_date(fname:intel/06-08-06;cpuid:00000686;pf_mask:0x2)
= 2000.05.04 iucode_date(fname:intel/06-08-06;cpuid:00000686;pf_mask:0x2;segment:"Mobile";codename:"Coppermine_[PIII]";stepping:"C0";pf_model:0x2)
= 2000.05.04 iucode_date(fname:intel/06-08-06;cpuid:00000686;pf_mask:0x4)
= 2000.05.04 iucode_date(fname:intel/06-08-06;cpuid:00000686;pf_mask:0x4;segment:"Server";codename:"Cascades_SECC_[PIII]";stepping:"C0";pf_model:0x4)
= 2000.05.04 iucode_date(fname:intel/06-08-06;cpuid:00000686;pf_mask:0x80)
= 2000.05.04 iucode_date(fname:intel/06-08-06;cpuid:00000686;pf_mask:0x80;segment:"Desktop";codename:"Coppermine_[PIII]";stepping:"C0";pf_model:0x80)
= 2000.11.02 iucode_date(fname:intel/06-08-0a;cpuid:0000068a;pf_mask:0x10)
= 2000.11.02 iucode_date(fname:intel/06-08-0a;cpuid:0000068a;pf_mask:0x10;segment:"Desktop";codename:"Coppermine_[PIII]";stepping:"D0";pf_model:0xff)
= 2000.12.07 iucode_date(fname:intel/06-08-0a;cpuid:0000068a;pf_mask:0x20)
= 2000.12.07 iucode_date(fname:intel/06-08-0a;cpuid:0000068a;pf_mask:0x20;segment:"Desktop";codename:"Coppermine_[PIII]";stepping:"D0";pf_model:0xff)
= 2000.12.07 iucode_date(fname:intel/06-08-0a;cpuid:0000068a;pf_mask:0x80)
= 2000.12.07 iucode_date(fname:intel/06-08-0a;cpuid:0000068a;pf_mask:0x80;segment:"Desktop";codename:"Coppermine_[PIII]";stepping:"D0";pf_model:0xff)
= 2004.11.09 iucode_date(fname:intel/06-09-05;cpuid:00000695;pf_mask:0x10)
= 2004.11.09 iucode_date(fname:intel/06-09-05;cpuid:00000695;pf_mask:0x10;segment:"Mobile";codename:"Banias_[P-M]";stepping:"B1";pf_model:0xb0)
= 2004.11.09 iucode_date(fname:intel/06-09-05;cpuid:00000695;pf_mask:0x20)
= 2004.11.09 iucode_date(fname:intel/06-09-05;cpuid:00000695;pf_mask:0x20;segment:"Mobile";codename:"Banias_[P-M]";stepping:"B1";pf_model:0xb0)
= 2004.11.09 iucode_date(fname:intel/06-09-05;cpuid:00000695;pf_mask:0x80)
= 2004.11.09 iucode_date(fname:intel/06-09-05;cpuid:00000695;pf_mask:0x80;segment:"Mobile";codename:"Banias_[P-M]";stepping:"B1";pf_model:0xb0)
= 2000.01.10 iucode_date(fname:intel/06-0a-00;cpuid:000006a0;pf_mask:0x4)
= 2000.01.10 iucode_date(fname:intel/06-0a-00;cpuid:000006a0;pf_mask:0x4;segment:"Server";codename:"Cascades_[PIII]";stepping:"A0";pf_model:0x4)
= 2000.03.06 iucode_date(fname:intel/06-0a-01;cpuid:000006a1;pf_mask:0x4)
= 2000.03.06 iucode_date(fname:intel/06-0a-01;cpuid:000006a1;pf_mask:0x4;segment:"Server";codename:"Cascades_[PIII]";stepping:"A1";pf_model:0x4)
= 2001.02.15 iucode_date(fname:intel/06-0b-01;cpuid:000006b1;pf_mask:0x10)
= 2001.02.15 iucode_date(fname:intel/06-0b-01;cpuid:000006b1;pf_mask:0x10;segment:"Desktop";codename:"Tualatin_FC-PGA2_[PIII]";stepping:"A1";pf_model:0x10)
= 2001.02.20 iucode_date(fname:intel/06-0b-01;cpuid:000006b1;pf_mask:0x20)
= 2001.02.20 iucode_date(fname:intel/06-0b-01;cpuid:000006b1;pf_mask:0x20;segment:"Mobile";codename:"Tualatin_Micro-PGA2_[PIII]";stepping:"A1";pf_model:0x20)
= 2002.01.10 iucode_date(fname:intel/06-0b-04;cpuid:000006b4;pf_mask:0x10)
= 2002.01.10 iucode_date(fname:intel/06-0b-04;cpuid:000006b4;pf_mask:0x10;segment:"Desktop";codename:"Tualatin_FC-PGA2_[PIII]";stepping:"B1";pf_model:0x10)
= 2002.01.11 iucode_date(fname:intel/06-0b-04;cpuid:000006b4;pf_mask:0x20)
= 2002.01.11 iucode_date(fname:intel/06-0b-04;cpuid:000006b4;pf_mask:0x20;segment:"Mobile";codename:"Tualatin_Micro-PGA2_[PIII]";stepping:"B1";pf_model:0x20)
= 2004.10.17 iucode_date(fname:intel/06-0d-06;cpuid:000006d6;pf_mask:0x20)
= 2004.10.17 iucode_date(fname:intel/06-0d-06;cpuid:000006d6;pf_mask:0x20;segment:"Mobile";codename:"Dothan_[P-M]";stepping:"B0";pf_model:0x20)
= 2005.11.15 iucode_date(fname:intel/06-0e-08;cpuid:000006e8;pf_mask:0x20)
= 2005.11.15 iucode_date(fname:intel/06-0e-08;cpuid:000006e8;pf_mask:0x20;segment:"Mobile";codename:"Yonah";stepping:"C0";pf_model:0x20)
= 2006.05.01 iucode_date(fname:intel/06-0e-0c;cpuid:000006ec;pf_mask:0x20)
= 2006.05.01 iucode_date(fname:intel/06-0e-0c;cpuid:000006ec;pf_mask:0x20;segment:"Mobile";codename:"Yonah";stepping:"E0";pf_model:0xa0)
= 2006.09.12 iucode_date(fname:intel/06-0e-0c;cpuid:000006ec;pf_mask:0x80)
= 2006.09.12 iucode_date(fname:intel/06-0e-0c;cpuid:000006ec;pf_mask:0x80;segment:"Mobile";codename:"Yonah";stepping:"E0";pf_model:0xa0)
= 2010.10.02 iucode_date(fname:intel/06-0f-02;cpuid:000006f2;pf_mask:0x1)
= 2010.10.02 iucode_date(fname:intel/06-0f-02;cpuid:000006f2;pf_mask:0x1;segment:"Desktop";codename:"Conroe_[Merom]";stepping:"L2";pf_model:0x1)
= 2010.10.02 iucode_date(fname:intel/06-0f-02;cpuid:000006f2;pf_mask:0x1;segment:"Server";codename:"Conroe_Xeon_[Merom]";stepping:"L2";pf_model:0x1)
= 2010.10.02 iucode_date(fname:intel/06-0f-02;cpuid:000006f2;pf_mask:0x20)
= 2010.10.02 iucode_date(fname:intel/06-0f-02;cpuid:000006f2;pf_mask:0x20;segment:"Mobile";codename:"Merom";stepping:"L2";pf_model:0x20)
= 2010.09.30 iucode_date(fname:intel/06-0f-06;cpuid:000006f6;pf_mask:0x1)
= 2010.09.30 iucode_date(fname:intel/06-0f-06;cpuid:000006f6;pf_mask:0x1;segment:"Desktop";codename:"Conroe_[Merom]";stepping:"B2";pf_model:0x1)
= 2010.09.30 iucode_date(fname:intel/06-0f-06;cpuid:000006f6;pf_mask:0x1;segment:"Server";codename:"Conroe_Xeon_[Merom]";stepping:"B2";pf_model:0x1)
= 2010.10.01 iucode_date(fname:intel/06-0f-06;cpuid:000006f6;pf_mask:0x20)
= 2010.10.01 iucode_date(fname:intel/06-0f-06;cpuid:000006f6;pf_mask:0x20;segment:"Mobile";codename:"Merom";stepping:"B2";pf_model:0x20)
= 2010.10.01 iucode_date(fname:intel/06-0f-06;cpuid:000006f6;pf_mask:0x4)
= 2010.10.01 iucode_date(fname:intel/06-0f-06;cpuid:000006f6;pf_mask:0x4;segment:"Server";codename:"Woodcrest_[Merom]";stepping:"B2";pf_model:0x4)
= 2010.10.02 iucode_date(fname:intel/06-0f-07;cpuid:000006f7;pf_mask:0x10)
= 2010.10.02 iucode_date(fname:intel/06-0f-07;cpuid:000006f7;pf_mask:0x10;segment:"Desktop";codename:"Kentsfield_[Merom]";stepping:"B3";pf_model:0x10)
= 2010.10.02 iucode_date(fname:intel/06-0f-07;cpuid:000006f7;pf_mask:0x10;segment:"Server";codename:"Kentsfield_Xeon_[Merom]";stepping:"B3";pf_model:0x10)
= 2010.10.02 iucode_date(fname:intel/06-0f-07;cpuid:000006f7;pf_mask:0x40)
= 2010.10.02 iucode_date(fname:intel/06-0f-07;cpuid:000006f7;pf_mask:0x40;segment:"Server";codename:"Clovertown_[Merom]";stepping:"B3";pf_model:0x40)
= 2010.10.02 iucode_date(fname:intel/06-0f-0a;cpuid:000006fa;pf_mask:0x80)
= 2010.10.02 iucode_date(fname:intel/06-0f-0a;cpuid:000006fa;pf_mask:0x80;segment:"Mobile";codename:"Merom";stepping:"E1";pf_model:0x80)
= 2010.10.03 iucode_date(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x10)
= 2010.10.03 iucode_date(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x10;segment:"Desktop";codename:"Kentsfield_[Merom]";stepping:"G0";pf_model:0x10)
= 2010.10.03 iucode_date(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x10;segment:"Server";codename:"Kentsfield_Xeon_[Merom]";stepping:"G0";pf_model:0x10)
= 2010.10.03 iucode_date(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x1)
= 2010.10.03 iucode_date(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x1;segment:"Desktop";codename:"Conroe_[Merom]";stepping:"G0";pf_model:0x1)
= 2010.10.03 iucode_date(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x1;segment:"Server";codename:"Conroe_Xeon_[Merom]";stepping:"G0";pf_model:0x1)
= 2010.10.03 iucode_date(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x20)
= 2010.10.03 iucode_date(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x20;segment:"Mobile";codename:"Merom";stepping:"G0";pf_model:0xa0)
= 2010.10.03 iucode_date(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x40)
= 2010.10.03 iucode_date(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x40;segment:"Server";codename:"Clovertown_[Merom]";stepping:"G0";pf_model:0x40)
= 2010.10.03 iucode_date(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x4)
= 2010.10.03 iucode_date(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x4;segment:"Server";codename:"Woodcrest_[Merom]";stepping:"G0";pf_model:0x4)
= 2010.10.03 iucode_date(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x80)
= 2010.10.03 iucode_date(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x80;segment:"Mobile";codename:"Merom";stepping:"G0";pf_model:0xa0)
= 2010.10.03 iucode_date(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x8)
= 2010.10.03 iucode_date(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x8;segment:"Server";codename:"Tigerton_[Merom]";stepping:"G0";pf_model:0x8)
= 2010.10.02 iucode_date(fname:intel/06-0f-0d;cpuid:000006fd;pf_mask:0x1)
= 2010.10.02 iucode_date(fname:intel/06-0f-0d;cpuid:000006fd;pf_mask:0x1;segment:"Desktop";codename:"Conroe_[Merom]";stepping:"M0";pf_model:0x1)
= 2010.10.02 iucode_date(fname:intel/06-0f-0d;cpuid:000006fd;pf_mask:0x20)
= 2010.10.02 iucode_date(fname:intel/06-0f-0d;cpuid:000006fd;pf_mask:0x20;segment:"Mobile";codename:"Merom";stepping:"M0";pf_model:0xa0)
= 2010.10.02 iucode_date(fname:intel/06-0f-0d;cpuid:000006fd;pf_mask:0x80)
= 2010.10.02 iucode_date(fname:intel/06-0f-0d;cpuid:000006fd;pf_mask:0x80;segment:"Mobile";codename:"Merom";stepping:"M0";pf_model:0xa0)
= 2010.10.04 iucode_date(fname:intel/06-16-01;cpuid:00010661;pf_mask:0x1)
= 2010.10.04 iucode_date(fname:intel/06-16-01;cpuid:00010661;pf_mask:0x1;segment:"Desktop";codename:"Conroe-L_[Merom]";stepping:"A1";pf_model:0x1)
= 2010.10.04 iucode_date(fname:intel/06-16-01;cpuid:00010661;pf_mask:0x2)
= 2010.10.04 iucode_date(fname:intel/06-16-01;cpuid:00010661;pf_mask:0x2;segment:"Mobile";codename:"Merom-L";stepping:"A1";pf_model:0x82)
= 2010.10.04 iucode_date(fname:intel/06-16-01;cpuid:00010661;pf_mask:0x80)
= 2010.10.04 iucode_date(fname:intel/06-16-01;cpuid:00010661;pf_mask:0x80;segment:"Mobile";codename:"Merom-L";stepping:"A1";pf_model:0x82)
= 2010.09.29 iucode_date(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x10)
= 2010.09.29 iucode_date(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x10;segment:"Desktop";codename:"Wolfdale_[Penryn]";stepping:"M0";pf_model:0x91)
= 2010.09.29 iucode_date(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x10;segment:"Desktop";codename:"Yorkfield_[Penryn]";stepping:"C0";pf_model:0x91)
= 2010.09.29 iucode_date(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x10;segment:"Mobile";codename:"Penryn";stepping:"C0";pf_model:0x91)
= 2010.09.29 iucode_date(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x10;segment:"Server";codename:"Wolfdale_Xeon_[Penryn]";stepping:"C0";pf_model:0x91)
= 2010.09.29 iucode_date(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x10;segment:"Server";codename:"Yorkfield_Xeon_[Penryn]";stepping:"C0";pf_model:0x91)
= 2010.09.29 iucode_date(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x1)
= 2010.09.29 iucode_date(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x1;segment:"Desktop";codename:"Wolfdale_[Penryn]";stepping:"M0";pf_model:0x91)
= 2010.09.29 iucode_date(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x1;segment:"Desktop";codename:"Yorkfield_[Penryn]";stepping:"C0";pf_model:0x91)
= 2010.09.29 iucode_date(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x1;segment:"Mobile";codename:"Penryn";stepping:"C0";pf_model:0x91)
= 2010.09.29 iucode_date(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x1;segment:"Server";codename:"Wolfdale_Xeon_[Penryn]";stepping:"C0";pf_model:0x91)
= 2010.09.29 iucode_date(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x1;segment:"Server";codename:"Yorkfield_Xeon_[Penryn]";stepping:"C0";pf_model:0x91)
= 2010.09.29 iucode_date(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x40)
= 2010.09.29 iucode_date(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x40;segment:"Server";codename:"Harpertown_[Penryn]";stepping:"C0";pf_model:0x40)
= 2010.09.29 iucode_date(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x4)
= 2010.09.29 iucode_date(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x4;segment:"Server";codename:"Wolfdale-DP_[Penryn]";stepping:"M0";pf_model:0x4)
= 2010.09.29 iucode_date(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x80)
= 2010.09.29 iucode_date(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x80;segment:"Desktop";codename:"Wolfdale_[Penryn]";stepping:"M0";pf_model:0x91)
= 2010.09.29 iucode_date(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x80;segment:"Desktop";codename:"Yorkfield_[Penryn]";stepping:"C0";pf_model:0x91)
= 2010.09.29 iucode_date(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x80;segment:"Mobile";codename:"Penryn";stepping:"C0";pf_model:0x91)
= 2010.09.29 iucode_date(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x80;segment:"Server";codename:"Wolfdale_Xeon_[Penryn]";stepping:"C0";pf_model:0x91)
= 2010.09.29 iucode_date(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x80;segment:"Server";codename:"Yorkfield_Xeon_[Penryn]";stepping:"C0";pf_model:0x91)
= 2010.09.29 iucode_date(fname:intel/06-17-07;cpuid:00010677;pf_mask:0x10)
= 2010.09.29 iucode_date(fname:intel/06-17-07;cpuid:00010677;pf_mask:0x10;segment:"Desktop";codename:"Yorkfield_[Penryn]";stepping:"C1";pf_model:0x10)
= 2010.09.29 iucode_date(fname:intel/06-17-07;cpuid:00010677;pf_mask:0x10;segment:"Desktop";codename:"Yorkfield_[Penryn]";stepping:"M1";pf_model:0x10)
= 2010.09.29 iucode_date(fname:intel/06-17-07;cpuid:00010677;pf_mask:0x10;segment:"Server";codename:"Yorkfield_Xeon_[Penryn]";stepping:"C1";pf_model:0x10)
= 2010.09.29 iucode_date(fname:intel/06-17-07;cpuid:00010677;pf_mask:0x10;segment:"Server";codename:"Yorkfield_Xeon_[Penryn]";stepping:"M1";pf_model:0x10)
= 2010.09.28 iucode_date(fname:intel/06-17-0a;cpuid:0001067a;pf_mask:0x11)
= 2010.09.28 iucode_date(fname:intel/06-17-0a;cpuid:0001067a;pf_mask:0x11;segment:"Desktop";codename:"Wolfdale_[Penryn]";stepping:"E0";pf_model:0xb1)
= 2010.09.28 iucode_date(fname:intel/06-17-0a;cpuid:0001067a;pf_mask:0x11;segment:"Desktop";codename:"Wolfdale_[Penryn]";stepping:"R0";pf_model:0xb1)
= 2010.09.28 iucode_date(fname:intel/06-17-0a;cpuid:0001067a;pf_mask:0x11;segment:"Mobile";codename:"Wolfdale_[Penryn]";stepping:"E0";pf_model:0xb1)
= 2010.09.28 iucode_date(fname:intel/06-17-0a;cpuid:0001067a;pf_mask:0x11;segment:"Mobile";codename:"Wolfdale_[Penryn]";stepping:"R0";pf_model:0xb1)
= 2010.09.28 iucode_date(fname:intel/06-17-0a;cpuid:0001067a;pf_mask:0x44)
= 2010.09.28 iucode_date(fname:intel/06-17-0a;cpuid:0001067a;pf_mask:0x44;segment:"Server";codename:"Harpertown_[Penryn]";stepping:"E0";pf_model:0x44)
= 2010.09.28 iucode_date(fname:intel/06-17-0a;cpuid:0001067a;pf_mask:0x44;segment:"Server";codename:"Wolfdale-DP_[Penryn]";stepping:"E0";pf_model:0x44)
= 2010.09.28 iucode_date(fname:intel/06-17-0a;cpuid:0001067a;pf_mask:0xa0)
= 2010.09.28 iucode_date(fname:intel/06-17-0a;cpuid:0001067a;pf_mask:0xa0;segment:"Desktop";codename:"Wolfdale_[Penryn]";stepping:"E0";pf_model:0xb1)
= 2010.09.28 iucode_date(fname:intel/06-17-0a;cpuid:0001067a;pf_mask:0xa0;segment:"Desktop";codename:"Wolfdale_[Penryn]";stepping:"R0";pf_model:0xb1)
= 2010.09.28 iucode_date(fname:intel/06-17-0a;cpuid:0001067a;pf_mask:0xa0;segment:"Mobile";codename:"Wolfdale_[Penryn]";stepping:"E0";pf_model:0xb1)
= 2010.09.28 iucode_date(fname:intel/06-17-0a;cpuid:0001067a;pf_mask:0xa0;segment:"Mobile";codename:"Wolfdale_[Penryn]";stepping:"R0";pf_model:0xb1)
= 2013.06.21 iucode_date(fname:intel/06-1a-04;cpuid:000106a4;pf_mask:0x3)
= 2013.06.21 iucode_date(fname:intel/06-1a-04;cpuid:000106a4;pf_mask:0x3;segment:"Dekstop";codename:"Bloomfield_[Nehalem]";stepping:"C0";pf_model:0x3)
= 2018.05.11 iucode_date(fname:intel/06-1a-05;cpuid:000106a5;pf_mask:0x3)
= 2018.05.11 iucode_date(fname:intel/06-1a-05;cpuid:000106a5;pf_mask:0x3;segment:"Dekstop";codename:"Bloomfield_[Nehalem]";stepping:"D0";pf_model:0x3)
= 2018.05.11 iucode_date(fname:intel/06-1a-05;cpuid:000106a5;pf_mask:0x3;segment:"Server";codename:"Bloomfield_Xeon_[Nehalem]_EP";stepping:"D0";pf_model:0x3)
= 2018.05.11 iucode_date(fname:intel/06-1a-05;cpuid:000106a5;pf_mask:0x3;segment:"Server";codename:"Bloomfield_Xeon_[Nehalem]";stepping:"D0";pf_model:0x3)
= 2018.05.11 iucode_date(fname:intel/06-1a-05;cpuid:000106a5;pf_mask:0x3;segment:"Server";codename:"Bloomfield_Xeon_[Nehalem]_WS";stepping:"D0";pf_model:0x3)
= 2009.04.10 iucode_date(fname:intel/06-1c-02;cpuid:000106c2;pf_mask:0x1)
= 2009.04.10 iucode_date(fname:intel/06-1c-02;cpuid:000106c2;pf_mask:0x1;segment:"Mobile";codename:"Silverthorne_[Bonnell]";stepping:"C0";pf_model:0x1)
= 2009.04.10 iucode_date(fname:intel/06-1c-02;cpuid:000106c2;pf_mask:0x4)
= 2009.04.10 iucode_date(fname:intel/06-1c-02;cpuid:000106c2;pf_mask:0x4;segment:"Desktop";codename:"Diamondville_[Bonnell]";stepping:"C0";pf_model:0x4)
= 2009.04.10 iucode_date(fname:intel/06-1c-02;cpuid:000106c2;pf_mask:0x4;segment:"Mobile";codename:"Diamondville_[Bonnell]";stepping:"C0";pf_model:0x4)
= 2009.04.10 iucode_date(fname:intel/06-1c-02;cpuid:000106c2;pf_mask:0x8)
= 2009.04.10 iucode_date(fname:intel/06-1c-02;cpuid:000106c2;pf_mask:0x8;segment:"Desktop";codename:"Diamondville_[Bonnell]";stepping:"C0";pf_model:0x8)
= 2009.08.25 iucode_date(fname:intel/06-1c-0a;cpuid:000106ca;pf_mask:0x10)
= 2009.08.25 iucode_date(fname:intel/06-1c-0a;cpuid:000106ca;pf_mask:0x10;segment:"Desktop";codename:"Pineview_[Bonnell]";stepping:"B0";pf_model:0x18)
= 2009.08.25 iucode_date(fname:intel/06-1c-0a;cpuid:000106ca;pf_mask:0x10;segment:"Mobile";codename:"Pineview_[Bonnell]";stepping:"B0";pf_model:0x18)
= 2009.08.25 iucode_date(fname:intel/06-1c-0a;cpuid:000106ca;pf_mask:0x1)
= 2009.08.25 iucode_date(fname:intel/06-1c-0a;cpuid:000106ca;pf_mask:0x1;segment:"Desktop";codename:"Pineview_[Bonnell]";stepping:"A0";pf_model:0x5)
= 2009.08.25 iucode_date(fname:intel/06-1c-0a;cpuid:000106ca;pf_mask:0x1;segment:"Mobile";codename:"Pineview_[Bonnell]";stepping:"A0";pf_model:0x5)
= 2009.08.25 iucode_date(fname:intel/06-1c-0a;cpuid:000106ca;pf_mask:0x4)
= 2009.08.25 iucode_date(fname:intel/06-1c-0a;cpuid:000106ca;pf_mask:0x4;segment:"Desktop";codename:"Pineview_[Bonnell]";stepping:"A0";pf_model:0x5)
= 2009.08.25 iucode_date(fname:intel/06-1c-0a;cpuid:000106ca;pf_mask:0x4;segment:"Mobile";codename:"Pineview_[Bonnell]";stepping:"A0";pf_model:0x5)
= 2009.08.25 iucode_date(fname:intel/06-1c-0a;cpuid:000106ca;pf_mask:0x8)
= 2009.08.25 iucode_date(fname:intel/06-1c-0a;cpuid:000106ca;pf_mask:0x8;segment:"Desktop";codename:"Pineview_[Bonnell]";stepping:"B0";pf_model:0x18)
= 2009.08.25 iucode_date(fname:intel/06-1c-0a;cpuid:000106ca;pf_mask:0x8;segment:"Mobile";codename:"Pineview_[Bonnell]";stepping:"B0";pf_model:0x18)
= 2010.09.30 iucode_date(fname:intel/06-1d-01;cpuid:000106d1;pf_mask:0x8)
= 2010.09.30 iucode_date(fname:intel/06-1d-01;cpuid:000106d1;pf_mask:0x8;segment:"Server";codename:"Dunnington_[Penryn]";stepping:"A1";pf_model:0x8)
= 2018.05.08 iucode_date(fname:intel/06-1e-05;cpuid:000106e5;pf_mask:0x13)
= 2018.05.08 iucode_date(fname:intel/06-1e-05;cpuid:000106e5;pf_mask:0x13;segment:"Dekstop";codename:"Lynnfield_[Nehalem]";stepping:"B1";pf_model:0x13)
= 2018.05.08 iucode_date(fname:intel/06-1e-05;cpuid:000106e5;pf_mask:0x13;segment:"Mobile";codename:"Clarksfield_[Nehalem]";stepping:"B1";pf_model:0x13)
= 2018.05.08 iucode_date(fname:intel/06-1e-05;cpuid:000106e5;pf_mask:0x13;segment:"Server";codename:"Lynnfield_Xeon_[Nehalem]";stepping:"B1";pf_model:0x13)
= 2018.05.08 iucode_date(fname:intel/06-25-02;cpuid:00020652;pf_mask:0x12)
= 2018.05.08 iucode_date(fname:intel/06-25-02;cpuid:00020652;pf_mask:0x12;segment:"Desktop";codename:"Westmere";stepping:"C2";pf_model:0x12)
= 2018.05.08 iucode_date(fname:intel/06-25-02;cpuid:00020652;pf_mask:0x12;segment:"Desktop";codename:"Westmere";stepping:"K0";pf_model:0x12)
= 2018.05.08 iucode_date(fname:intel/06-25-02;cpuid:00020652;pf_mask:0x12;segment:"Mobile";codename:"Westmere";stepping:"C2";pf_model:0x12)
= 2018.05.08 iucode_date(fname:intel/06-25-02;cpuid:00020652;pf_mask:0x12;segment:"Mobile";codename:"Westmere";stepping:"K0";pf_model:0x12)
= 2018.05.08 iucode_date(fname:intel/06-25-02;cpuid:00020652;pf_mask:0x12;segment:"Server";codename:"Westmere";stepping:"C2";pf_model:0x12)
= 2018.05.08 iucode_date(fname:intel/06-25-02;cpuid:00020652;pf_mask:0x12;segment:"Server";codename:"Westmere";stepping:"K0";pf_model:0x12)
= 2018.04.23 iucode_date(fname:intel/06-25-05;cpuid:00020655;pf_mask:0x92)
= 2018.04.23 iucode_date(fname:intel/06-25-05;cpuid:00020655;pf_mask:0x92;segment:"Desktop";codename:"Clarkdale_[Westmere]";stepping:"K0";pf_model:0x92)
= 2018.04.23 iucode_date(fname:intel/06-25-05;cpuid:00020655;pf_mask:0x92;segment:"Mobile";codename:"Arrandale_[Westmere]";stepping:"K0";pf_model:0x92)
= 2009.10.23 iucode_date(fname:intel/06-26-01;cpuid:00020661;pf_mask:0x1)
= 2009.10.23 iucode_date(fname:intel/06-26-01;cpuid:00020661;pf_mask:0x1;segment:"SOC";codename:"Lincroft_[Bonnell]";stepping:"C0";pf_model:0x1)
= 2011.07.18 iucode_date(fname:intel/06-26-01;cpuid:00020661;pf_mask:0x2)
= 2011.07.18 iucode_date(fname:intel/06-26-01;cpuid:00020661;pf_mask:0x2;segment:"SOC";codename:"Tunnell_Creek_[Bonnell]";stepping:"B0";pf_model:0x2)
= 2011.07.18 iucode_date(fname:intel/06-26-01;cpuid:00020661;pf_mask:0x2;segment:"SOC";codename:"Tunnell_Creek_[Bonnell]";stepping:"B1";pf_model:0x2)
= 2019.02.17 iucode_date(fname:intel/06-2a-07;cpuid:000206a7;pf_mask:0x12)
= 2019.02.17 iucode_date(fname:intel/06-2a-07;cpuid:000206a7;pf_mask:0x12;segment:"Desktop";codename:"Sandy_Bridge";stepping:"D2";pf_model:0x12)
= 2019.02.17 iucode_date(fname:intel/06-2a-07;cpuid:000206a7;pf_mask:0x12;segment:"Desktop";codename:"Sandy_Bridge";stepping:"J1";pf_model:0x12)
= 2019.02.17 iucode_date(fname:intel/06-2a-07;cpuid:000206a7;pf_mask:0x12;segment:"Desktop";codename:"Sandy_Bridge";stepping:"Q0";pf_model:0x12)
= 2019.02.17 iucode_date(fname:intel/06-2a-07;cpuid:000206a7;pf_mask:0x12;segment:"Mobile";codename:"Sandy_Bridge";stepping:"D2";pf_model:0x12)
= 2019.02.17 iucode_date(fname:intel/06-2a-07;cpuid:000206a7;pf_mask:0x12;segment:"Mobile";codename:"Sandy_Bridge";stepping:"J1";pf_model:0x12)
= 2019.02.17 iucode_date(fname:intel/06-2a-07;cpuid:000206a7;pf_mask:0x12;segment:"Mobile";codename:"Sandy_Bridge";stepping:"Q0";pf_model:0x12)
= 2019.02.17 iucode_date(fname:intel/06-2a-07;cpuid:000206a7;pf_mask:0x12;segment:"Server";codename:"Sandy_Bridge";stepping:"D2";pf_model:0x12)
= 2019.02.17 iucode_date(fname:intel/06-2a-07;cpuid:000206a7;pf_mask:0x12;segment:"Server";codename:"Sandy_Bridge";stepping:"Q0";pf_model:0x12)
= 2019.02.17 iucode_date(fname:intel/06-2a-07;cpuid:000206a7;pf_mask:0x12;segment:"Server";codename:"Sandy_Bridge_Xeon_E3";stepping:"D2";pf_model:0x12)
= 2019.02.17 iucode_date(fname:intel/06-2a-07;cpuid:000206a7;pf_mask:0x12;segment:"Server";codename:"Sandy_Bridge_Xeon_E3";stepping:"Q0";pf_model:0x12)
= 2018.05.08 iucode_date(fname:intel/06-2c-02;cpuid:000206c2;pf_mask:0x3)
= 2018.05.08 iucode_date(fname:intel/06-2c-02;cpuid:000206c2;pf_mask:0x3;segment:"Desktop";codename:"Gulftown_[Westmere]";stepping:"B1";pf_model:0x3)
= 2018.05.08 iucode_date(fname:intel/06-2c-02;cpuid:000206c2;pf_mask:0x3;segment:"Server";codename:"Westmere-EP_EP";stepping:"B1";pf_model:0x3)
= 2018.05.08 iucode_date(fname:intel/06-2c-02;cpuid:000206c2;pf_mask:0x3;segment:"Server";codename:"Westmere-EP";stepping:"B1";pf_model:0x3)
= 2018.05.08 iucode_date(fname:intel/06-2c-02;cpuid:000206c2;pf_mask:0x3;segment:"Server";codename:"Westmere-WS";stepping:"B1";pf_model:0x3)
= 2018.05.08 iucode_date(fname:intel/06-2c-02;cpuid:000206c2;pf_mask:0x3;segment:"Server";codename:"Westmere-WS_WS";stepping:"B1";pf_model:0x3)
= 2020.03.04 iucode_date(fname:intel/06-2d-06;cpuid:000206d6;pf_mask:0x6d)
= 2020.03.04 iucode_date(fname:intel/06-2d-06;cpuid:000206d6;pf_mask:0x6d;segment:"Desktop";codename:"Sandy_Bridge_E";stepping:"C1";pf_model:0x6d)
= 2020.03.04 iucode_date(fname:intel/06-2d-06;cpuid:000206d6;pf_mask:0x6d;segment:"Desktop";codename:"Sandy_Bridge_E";stepping:"M0";pf_model:0x6d)
= 2020.03.04 iucode_date(fname:intel/06-2d-06;cpuid:000206d6;pf_mask:0x6d;segment:"Desktop";codename:"Sandy_Bridge";stepping:"C1";pf_model:0x6d)
= 2020.03.04 iucode_date(fname:intel/06-2d-06;cpuid:000206d6;pf_mask:0x6d;segment:"Desktop";codename:"Sandy_Bridge";stepping:"M0";pf_model:0x6d)
= 2020.03.04 iucode_date(fname:intel/06-2d-06;cpuid:000206d6;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge_EN";stepping:"C1";pf_model:0x6d)
= 2020.03.04 iucode_date(fname:intel/06-2d-06;cpuid:000206d6;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge_EN";stepping:"M0";pf_model:0x6d)
= 2020.03.04 iucode_date(fname:intel/06-2d-06;cpuid:000206d6;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge_EP";stepping:"C1";pf_model:0x6d)
= 2020.03.04 iucode_date(fname:intel/06-2d-06;cpuid:000206d6;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge_EP";stepping:"M0";pf_model:0x6d)
= 2020.03.04 iucode_date(fname:intel/06-2d-06;cpuid:000206d6;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge";stepping:"C1";pf_model:0x6d)
= 2020.03.04 iucode_date(fname:intel/06-2d-06;cpuid:000206d6;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge";stepping:"M0";pf_model:0x6d)
= 2020.03.24 iucode_date(fname:intel-06-2d-07/06-2d-07;cpuid:000206d7;pf_mask:0x6d)
= 2020.03.24 iucode_date(fname:intel-06-2d-07/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Desktop";codename:"Sandy_Bridge_E";stepping:"C2";pf_model:0x6d)
= 2020.03.24 iucode_date(fname:intel-06-2d-07/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Desktop";codename:"Sandy_Bridge_E";stepping:"M1";pf_model:0x6d)
= 2020.03.24 iucode_date(fname:intel-06-2d-07/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Desktop";codename:"Sandy_Bridge";stepping:"C2";pf_model:0x6d)
= 2020.03.24 iucode_date(fname:intel-06-2d-07/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Desktop";codename:"Sandy_Bridge";stepping:"M1";pf_model:0x6d)
= 2020.03.24 iucode_date(fname:intel-06-2d-07/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge_EN";stepping:"C2";pf_model:0x6d)
= 2020.03.24 iucode_date(fname:intel-06-2d-07/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge_EN";stepping:"M1";pf_model:0x6d)
= 2020.03.24 iucode_date(fname:intel-06-2d-07/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge_EP";stepping:"C2";pf_model:0x6d)
= 2020.03.24 iucode_date(fname:intel-06-2d-07/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge_EP";stepping:"M1";pf_model:0x6d)
= 2020.03.24 iucode_date(fname:intel-06-2d-07/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge";stepping:"C2";pf_model:0x6d)
= 2020.03.24 iucode_date(fname:intel-06-2d-07/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge";stepping:"M1";pf_model:0x6d)
= 2018.05.08 iucode_date(fname:intel/06-2d-07;cpuid:000206d7;pf_mask:0x6d)
= 2018.05.08 iucode_date(fname:intel/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Desktop";codename:"Sandy_Bridge_E";stepping:"C2";pf_model:0x6d)
= 2018.05.08 iucode_date(fname:intel/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Desktop";codename:"Sandy_Bridge_E";stepping:"M1";pf_model:0x6d)
= 2018.05.08 iucode_date(fname:intel/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Desktop";codename:"Sandy_Bridge";stepping:"C2";pf_model:0x6d)
= 2018.05.08 iucode_date(fname:intel/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Desktop";codename:"Sandy_Bridge";stepping:"M1";pf_model:0x6d)
= 2018.05.08 iucode_date(fname:intel/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge_EN";stepping:"C2";pf_model:0x6d)
= 2018.05.08 iucode_date(fname:intel/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge_EN";stepping:"M1";pf_model:0x6d)
= 2018.05.08 iucode_date(fname:intel/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge_EP";stepping:"C2";pf_model:0x6d)
= 2018.05.08 iucode_date(fname:intel/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge_EP";stepping:"M1";pf_model:0x6d)
= 2018.05.08 iucode_date(fname:intel/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge";stepping:"C2";pf_model:0x6d)
= 2018.05.08 iucode_date(fname:intel/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge";stepping:"M1";pf_model:0x6d)
= 2018.05.15 iucode_date(fname:intel/06-2e-06;cpuid:000206e6;pf_mask:0x4)
= 2018.05.15 iucode_date(fname:intel/06-2e-06;cpuid:000206e6;pf_mask:0x4;segment:"Server";codename:"Nehalem_EX";stepping:"D0";pf_model:0x4)
= 2018.05.15 iucode_date(fname:intel/06-2e-06;cpuid:000206e6;pf_mask:0x4;segment:"Server";codename:"Nehalem";stepping:"D0";pf_model:0x4)
= 2018.05.16 iucode_date(fname:intel/06-2f-02;cpuid:000206f2;pf_mask:0x5)
= 2018.05.16 iucode_date(fname:intel/06-2f-02;cpuid:000206f2;pf_mask:0x5;segment:"Server";codename:"Westmere-EX_EX";stepping:"A2";pf_model:0x5)
= 2018.05.16 iucode_date(fname:intel/06-2f-02;cpuid:000206f2;pf_mask:0x5;segment:"Server";codename:"Westmere-EX";stepping:"A2";pf_model:0x5)
= 2019.04.22 iucode_date(fname:intel/06-37-08;cpuid:00030678;pf_mask:0x2)
= 2019.04.22 iucode_date(fname:intel/06-37-08;cpuid:00030678;pf_mask:0x2;segment:"SOC";codename:"Valleyview";stepping:"C0";pf_model:0x2)
= 2019.04.22 iucode_date(fname:intel/06-37-08;cpuid:00030678;pf_mask:0xc)
= 2019.04.22 iucode_date(fname:intel/06-37-08;cpuid:00030678;pf_mask:0xc;segment:"SOC";codename:"Valleyview";stepping:"C0";pf_model:0xc)
= 2019.07.10 iucode_date(fname:intel/06-37-09;cpuid:00030679;pf_mask:0xf)
= 2019.07.10 iucode_date(fname:intel/06-37-09;cpuid:00030679;pf_mask:0xf;segment:"SOC";codename:"Valleyview";stepping:"D0";pf_model:0xf)
= 2019.02.13 iucode_date(fname:intel/06-3a-09;cpuid:000306a9;pf_mask:0x12)
= 2019.02.13 iucode_date(fname:intel/06-3a-09;cpuid:000306a9;pf_mask:0x12;segment:"Desktop";codename:"Ivy_Bridge";stepping:"E1";pf_model:0x12)
= 2019.02.13 iucode_date(fname:intel/06-3a-09;cpuid:000306a9;pf_mask:0x12;segment:"Desktop";codename:"Ivy_Bridge";stepping:"E2";pf_model:0x12)
= 2019.02.13 iucode_date(fname:intel/06-3a-09;cpuid:000306a9;pf_mask:0x12;segment:"Desktop";codename:"Ivy_Bridge";stepping:"L1";pf_model:0x12)
= 2019.02.13 iucode_date(fname:intel/06-3a-09;cpuid:000306a9;pf_mask:0x12;segment:"Mobile";codename:"Ivy_Bridge";stepping:"E1";pf_model:0x12)
= 2019.02.13 iucode_date(fname:intel/06-3a-09;cpuid:000306a9;pf_mask:0x12;segment:"Mobile";codename:"Ivy_Bridge";stepping:"E2";pf_model:0x12)
= 2019.02.13 iucode_date(fname:intel/06-3a-09;cpuid:000306a9;pf_mask:0x12;segment:"Mobile";codename:"Ivy_Bridge";stepping:"L1";pf_model:0x12)
= 2019.02.13 iucode_date(fname:intel/06-3a-09;cpuid:000306a9;pf_mask:0x12;segment:"Server";codename:"Ivy_Bridge";stepping:"E1";pf_model:0x12)
= 2019.02.13 iucode_date(fname:intel/06-3a-09;cpuid:000306a9;pf_mask:0x12;segment:"Server";codename:"Ivy_Bridge";stepping:"E2";pf_model:0x12)
= 2019.02.13 iucode_date(fname:intel/06-3a-09;cpuid:000306a9;pf_mask:0x12;segment:"Server";codename:"Ivy_Bridge";stepping:"L1";pf_model:0x12)
= 2019.11.12 iucode_date(fname:intel/06-3c-03;cpuid:000306c3;pf_mask:0x32)
= 2019.11.12 iucode_date(fname:intel/06-3c-03;cpuid:000306c3;pf_mask:0x32;segment:"Desktop";codename:"Haswell_S";stepping:"Cx";pf_model:0x32)
= 2019.11.12 iucode_date(fname:intel/06-3c-03;cpuid:000306c3;pf_mask:0x32;segment:"Desktop";codename:"Haswell_S";stepping:"Dx";pf_model:0x32)
= 2019.11.12 iucode_date(fname:intel/06-3c-03;cpuid:000306c3;pf_mask:0x32;segment:"Desktop";codename:"Haswell";stepping:"Cx";pf_model:0x32)
= 2019.11.12 iucode_date(fname:intel/06-3c-03;cpuid:000306c3;pf_mask:0x32;segment:"Desktop";codename:"Haswell";stepping:"Dx";pf_model:0x32)
= 2019.11.12 iucode_date(fname:intel/06-3c-03;cpuid:000306c3;pf_mask:0x32;segment:"Mobile";codename:"Haswell_H";stepping:"Cx";pf_model:0x32)
= 2019.11.12 iucode_date(fname:intel/06-3c-03;cpuid:000306c3;pf_mask:0x32;segment:"Mobile";codename:"Haswell_H";stepping:"Dx";pf_model:0x32)
= 2019.11.12 iucode_date(fname:intel/06-3c-03;cpuid:000306c3;pf_mask:0x32;segment:"Mobile";codename:"Haswell";stepping:"Cx";pf_model:0x32)
= 2019.11.12 iucode_date(fname:intel/06-3c-03;cpuid:000306c3;pf_mask:0x32;segment:"Mobile";codename:"Haswell";stepping:"Dx";pf_model:0x32)
= 2019.11.12 iucode_date(fname:intel/06-3c-03;cpuid:000306c3;pf_mask:0x32;segment:"Server";codename:"Haswell";stepping:"Cx";pf_model:0x32)
= 2019.11.12 iucode_date(fname:intel/06-3c-03;cpuid:000306c3;pf_mask:0x32;segment:"Server";codename:"Haswell";stepping:"Dx";pf_model:0x32)
= 2019.11.12 iucode_date(fname:intel/06-3c-03;cpuid:000306c3;pf_mask:0x32;segment:"Server";codename:"Haswell_Xeon_E3";stepping:"Cx";pf_model:0x32)
= 2019.11.12 iucode_date(fname:intel/06-3c-03;cpuid:000306c3;pf_mask:0x32;segment:"Server";codename:"Haswell_Xeon_E3";stepping:"Dx";pf_model:0x32)
= 2019.11.12 iucode_date(fname:intel/06-3d-04;cpuid:000306d4;pf_mask:0xc0)
= 2019.11.12 iucode_date(fname:intel/06-3d-04;cpuid:000306d4;pf_mask:0xc0;segment:"Mobile";codename:"Broadwell";stepping:"E0";pf_model:0xc0)
= 2019.11.12 iucode_date(fname:intel/06-3d-04;cpuid:000306d4;pf_mask:0xc0;segment:"Mobile";codename:"Broadwell";stepping:"F0";pf_model:0xc0)
= 2019.11.12 iucode_date(fname:intel/06-3d-04;cpuid:000306d4;pf_mask:0xc0;segment:"Mobile";codename:"Broadwell_U";stepping:"E0";pf_model:0xc0)
= 2019.11.12 iucode_date(fname:intel/06-3d-04;cpuid:000306d4;pf_mask:0xc0;segment:"Mobile";codename:"Broadwell_U";stepping:"F0";pf_model:0xc0)
= 2019.11.12 iucode_date(fname:intel/06-3d-04;cpuid:000306d4;pf_mask:0xc0;segment:"Mobile";codename:"Broadwell_Y";stepping:"E0";pf_model:0xc0)
= 2019.11.12 iucode_date(fname:intel/06-3d-04;cpuid:000306d4;pf_mask:0xc0;segment:"Mobile";codename:"Broadwell_Y";stepping:"F0";pf_model:0xc0)
= 2019.03.14 iucode_date(fname:intel/06-3e-04;cpuid:000306e4;pf_mask:0xed)
= 2019.03.14 iucode_date(fname:intel/06-3e-04;cpuid:000306e4;pf_mask:0xed;segment:"Desktop";codename:"Ivy_Bridge_E";stepping:"S1";pf_model:0xed)
= 2019.03.14 iucode_date(fname:intel/06-3e-04;cpuid:000306e4;pf_mask:0xed;segment:"Desktop";codename:"Ivy_Bridge";stepping:"S1";pf_model:0xed)
= 2019.03.14 iucode_date(fname:intel/06-3e-04;cpuid:000306e4;pf_mask:0xed;segment:"Server";codename:"Ivy_Bridge_EP";stepping:"C0";pf_model:0xed)
= 2019.03.14 iucode_date(fname:intel/06-3e-04;cpuid:000306e4;pf_mask:0xed;segment:"Server";codename:"Ivy_Bridge_EP";stepping:"C1";pf_model:0xed)
= 2019.03.14 iucode_date(fname:intel/06-3e-04;cpuid:000306e4;pf_mask:0xed;segment:"Server";codename:"Ivy_Bridge_EP";stepping:"M1";pf_model:0xed)
= 2019.03.14 iucode_date(fname:intel/06-3e-04;cpuid:000306e4;pf_mask:0xed;segment:"Server";codename:"Ivy_Bridge_EP";stepping:"S1";pf_model:0xed)
= 2019.03.14 iucode_date(fname:intel/06-3e-04;cpuid:000306e4;pf_mask:0xed;segment:"Server";codename:"Ivy_Bridge";stepping:"C0";pf_model:0xed)
= 2019.03.14 iucode_date(fname:intel/06-3e-04;cpuid:000306e4;pf_mask:0xed;segment:"Server";codename:"Ivy_Bridge";stepping:"C1";pf_model:0xed)
= 2019.03.14 iucode_date(fname:intel/06-3e-04;cpuid:000306e4;pf_mask:0xed;segment:"Server";codename:"Ivy_Bridge";stepping:"M1";pf_model:0xed)
= 2019.03.14 iucode_date(fname:intel/06-3e-04;cpuid:000306e4;pf_mask:0xed;segment:"Server";codename:"Ivy_Bridge";stepping:"S1";pf_model:0xed)
= 2013.06.19 iucode_date(fname:intel/06-3e-06;cpuid:000306e6;pf_mask:0xed)
= 2019.03.14 iucode_date(fname:intel/06-3e-07;cpuid:000306e7;pf_mask:0xed)
= 2019.03.14 iucode_date(fname:intel/06-3e-07;cpuid:000306e7;pf_mask:0xed;segment:"Server";codename:"Ivy_Bridge_EX";stepping:"D1";pf_model:0xed)
= 2019.03.14 iucode_date(fname:intel/06-3e-07;cpuid:000306e7;pf_mask:0xed;segment:"Server";codename:"Ivy_Bridge";stepping:"D1";pf_model:0xed)
= 2021.08.11 iucode_date(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f)
= 2021.08.11 iucode_date(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Desktop";codename:"Haswell_E";stepping:"C0";pf_model:0x6f)
= 2021.08.11 iucode_date(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Desktop";codename:"Haswell_E";stepping:"C1";pf_model:0x6f)
= 2021.08.11 iucode_date(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Desktop";codename:"Haswell_E";stepping:"M1";pf_model:0x6f)
= 2021.08.11 iucode_date(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Desktop";codename:"Haswell_E";stepping:"R2";pf_model:0x6f)
= 2021.08.11 iucode_date(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Desktop";codename:"Haswell";stepping:"C0";pf_model:0x6f)
= 2021.08.11 iucode_date(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Desktop";codename:"Haswell";stepping:"C1";pf_model:0x6f)
= 2021.08.11 iucode_date(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Desktop";codename:"Haswell";stepping:"M1";pf_model:0x6f)
= 2021.08.11 iucode_date(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Desktop";codename:"Haswell";stepping:"R2";pf_model:0x6f)
= 2021.08.11 iucode_date(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell_EN";stepping:"C0";pf_model:0x6f)
= 2021.08.11 iucode_date(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell_EN";stepping:"C1";pf_model:0x6f)
= 2021.08.11 iucode_date(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell_EN";stepping:"M1";pf_model:0x6f)
= 2021.08.11 iucode_date(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell_EN";stepping:"R2";pf_model:0x6f)
= 2021.08.11 iucode_date(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell_EP_4S";stepping:"C0";pf_model:0x6f)
= 2021.08.11 iucode_date(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell_EP_4S";stepping:"C1";pf_model:0x6f)
= 2021.08.11 iucode_date(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell_EP_4S";stepping:"M1";pf_model:0x6f)
= 2021.08.11 iucode_date(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell_EP_4S";stepping:"R2";pf_model:0x6f)
= 2021.08.11 iucode_date(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell_EP";stepping:"C0";pf_model:0x6f)
= 2021.08.11 iucode_date(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell_EP";stepping:"C1";pf_model:0x6f)
= 2021.08.11 iucode_date(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell_EP";stepping:"M1";pf_model:0x6f)
= 2021.08.11 iucode_date(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell_EP";stepping:"R2";pf_model:0x6f)
= 2021.08.11 iucode_date(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell";stepping:"C0";pf_model:0x6f)
= 2021.08.11 iucode_date(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell";stepping:"C1";pf_model:0x6f)
= 2021.08.11 iucode_date(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell";stepping:"M1";pf_model:0x6f)
= 2021.08.11 iucode_date(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell";stepping:"R2";pf_model:0x6f)
= 2021.05.24 iucode_date(fname:intel/06-3f-04;cpuid:000306f4;pf_mask:0x80)
= 2021.05.24 iucode_date(fname:intel/06-3f-04;cpuid:000306f4;pf_mask:0x80;segment:"Server";codename:"Haswell_EX";stepping:"E0";pf_model:0x80)
= 2021.05.24 iucode_date(fname:intel/06-3f-04;cpuid:000306f4;pf_mask:0x80;segment:"Server";codename:"Haswell";stepping:"E0";pf_model:0x80)
= 2019.11.12 iucode_date(fname:intel/06-45-01;cpuid:00040651;pf_mask:0x72)
= 2019.11.12 iucode_date(fname:intel/06-45-01;cpuid:00040651;pf_mask:0x72;segment:"Mobile";codename:"Haswell";stepping:"Cx";pf_model:0x72)
= 2019.11.12 iucode_date(fname:intel/06-45-01;cpuid:00040651;pf_mask:0x72;segment:"Mobile";codename:"Haswell";stepping:"Dx";pf_model:0x72)
= 2019.11.12 iucode_date(fname:intel/06-45-01;cpuid:00040651;pf_mask:0x72;segment:"Mobile";codename:"Haswell_U";stepping:"Cx";pf_model:0x72)
= 2019.11.12 iucode_date(fname:intel/06-45-01;cpuid:00040651;pf_mask:0x72;segment:"Mobile";codename:"Haswell_U";stepping:"Dx";pf_model:0x72)
= 2019.11.12 iucode_date(fname:intel/06-46-01;cpuid:00040661;pf_mask:0x32)
= 2019.11.12 iucode_date(fname:intel/06-46-01;cpuid:00040661;pf_mask:0x32;segment:"Desktop";codename:"Haswell_R";stepping:"Cx";pf_model:0x32)
= 2019.11.12 iucode_date(fname:intel/06-46-01;cpuid:00040661;pf_mask:0x32;segment:"Desktop";codename:"Haswell_R";stepping:"Dx";pf_model:0x32)
= 2019.11.12 iucode_date(fname:intel/06-46-01;cpuid:00040661;pf_mask:0x32;segment:"Desktop";codename:"Haswell";stepping:"Cx";pf_model:0x32)
= 2019.11.12 iucode_date(fname:intel/06-46-01;cpuid:00040661;pf_mask:0x32;segment:"Desktop";codename:"Haswell";stepping:"Dx";pf_model:0x32)
= 2019.11.12 iucode_date(fname:intel/06-46-01;cpuid:00040661;pf_mask:0x32;segment:"Mobile";codename:"Haswell_H";stepping:"Cx";pf_model:0x32)
= 2019.11.12 iucode_date(fname:intel/06-46-01;cpuid:00040661;pf_mask:0x32;segment:"Mobile";codename:"Haswell_H";stepping:"Dx";pf_model:0x32)
= 2019.11.12 iucode_date(fname:intel/06-46-01;cpuid:00040661;pf_mask:0x32;segment:"Mobile";codename:"Haswell";stepping:"Cx";pf_model:0x32)
= 2019.11.12 iucode_date(fname:intel/06-46-01;cpuid:00040661;pf_mask:0x32;segment:"Mobile";codename:"Haswell";stepping:"Dx";pf_model:0x32)
= 2019.11.12 iucode_date(fname:intel/06-47-01;cpuid:00040671;pf_mask:0x22)
= 2019.11.12 iucode_date(fname:intel/06-47-01;cpuid:00040671;pf_mask:0x22;segment:"Desktop";codename:"Broadwell_S";stepping:"E0";pf_model:0x22)
= 2019.11.12 iucode_date(fname:intel/06-47-01;cpuid:00040671;pf_mask:0x22;segment:"Desktop";codename:"Broadwell_S";stepping:"G0";pf_model:0x22)
= 2019.11.12 iucode_date(fname:intel/06-47-01;cpuid:00040671;pf_mask:0x22;segment:"Desktop";codename:"Broadwell";stepping:"E0";pf_model:0x22)
= 2019.11.12 iucode_date(fname:intel/06-47-01;cpuid:00040671;pf_mask:0x22;segment:"Desktop";codename:"Broadwell";stepping:"G0";pf_model:0x22)
= 2019.11.12 iucode_date(fname:intel/06-47-01;cpuid:00040671;pf_mask:0x22;segment:"Mobile";codename:"Broadwell_H";stepping:"E0";pf_model:0x22)
= 2019.11.12 iucode_date(fname:intel/06-47-01;cpuid:00040671;pf_mask:0x22;segment:"Mobile";codename:"Broadwell_H";stepping:"G0";pf_model:0x22)
= 2019.11.12 iucode_date(fname:intel/06-47-01;cpuid:00040671;pf_mask:0x22;segment:"Mobile";codename:"Broadwell";stepping:"E0";pf_model:0x22)
= 2019.11.12 iucode_date(fname:intel/06-47-01;cpuid:00040671;pf_mask:0x22;segment:"Mobile";codename:"Broadwell";stepping:"G0";pf_model:0x22)
= 2019.11.12 iucode_date(fname:intel/06-47-01;cpuid:00040671;pf_mask:0x22;segment:"Server";codename:"Broadwell";stepping:"E0";pf_model:0x22)
= 2019.11.12 iucode_date(fname:intel/06-47-01;cpuid:00040671;pf_mask:0x22;segment:"Server";codename:"Broadwell";stepping:"G0";pf_model:0x22)
= 2019.11.12 iucode_date(fname:intel/06-47-01;cpuid:00040671;pf_mask:0x22;segment:"Server";codename:"Broadwell_Xeon_E3";stepping:"E0";pf_model:0x22)
= 2019.11.12 iucode_date(fname:intel/06-47-01;cpuid:00040671;pf_mask:0x22;segment:"Server";codename:"Broadwell_Xeon_E3";stepping:"G0";pf_model:0x22)
= 2019.04.23 iucode_date(fname:intel/06-4c-03;cpuid:000406c3;pf_mask:0x1)
= 2019.04.23 iucode_date(fname:intel/06-4c-03;cpuid:000406c3;pf_mask:0x1;segment:"SOC";codename:"Cherry_View";stepping:"C0";pf_model:0x1)
= 2019.04.23 iucode_date(fname:intel/06-4c-04;cpuid:000406c4;pf_mask:0x1)
= 2019.04.23 iucode_date(fname:intel/06-4c-04;cpuid:000406c4;pf_mask:0x1;segment:"SOC";codename:"Cherry_View";stepping:"D0";pf_model:0x1)
= 2019.09.16 iucode_date(fname:intel/06-4d-08;cpuid:000406d8;pf_mask:0x1)
= 2019.09.16 iucode_date(fname:intel/06-4d-08;cpuid:000406d8;pf_mask:0x1;segment:"SOC";codename:"Avoton";stepping:"B0";pf_model:0x1)
= 2019.09.16 iucode_date(fname:intel/06-4d-08;cpuid:000406d8;pf_mask:0x1;segment:"SOC";codename:"Avoton";stepping:"C0";pf_model:0x1)
= 2021.11.12 iucode_date(fname:intel-06-4e-03/06-4e-03;cpuid:000406e3;pf_mask:0xc0)
= 2021.11.12 iucode_date(fname:intel-06-4e-03/06-4e-03;cpuid:000406e3;pf_mask:0xc0;segment:"Mobile";codename:"Skylake";stepping:"D0";pf_model:0xc0)
= 2021.11.12 iucode_date(fname:intel-06-4e-03/06-4e-03;cpuid:000406e3;pf_mask:0xc0;segment:"Mobile";codename:"Skylake";stepping:"K1";pf_model:0xc0)
= 2021.11.12 iucode_date(fname:intel-06-4e-03/06-4e-03;cpuid:000406e3;pf_mask:0xc0;segment:"Mobile";codename:"Skylake_U_2+3e";stepping:"K1";pf_model:0xc0)
= 2021.11.12 iucode_date(fname:intel-06-4e-03/06-4e-03;cpuid:000406e3;pf_mask:0xc0;segment:"Mobile";codename:"Skylake_U";stepping:"D0";pf_model:0xc0)
= 2021.11.12 iucode_date(fname:intel-06-4e-03/06-4e-03;cpuid:000406e3;pf_mask:0xc0;segment:"Mobile";codename:"Skylake_Y";stepping:"D0";pf_model:0xc0)
= 2019.10.03 iucode_date(fname:intel/06-4e-03;cpuid:000406e3;pf_mask:0xc0)
= 2019.10.03 iucode_date(fname:intel/06-4e-03;cpuid:000406e3;pf_mask:0xc0;segment:"Mobile";codename:"Skylake";stepping:"D0";pf_model:0xc0)
= 2019.10.03 iucode_date(fname:intel/06-4e-03;cpuid:000406e3;pf_mask:0xc0;segment:"Mobile";codename:"Skylake";stepping:"K1";pf_model:0xc0)
= 2019.10.03 iucode_date(fname:intel/06-4e-03;cpuid:000406e3;pf_mask:0xc0;segment:"Mobile";codename:"Skylake_U_2+3e";stepping:"K1";pf_model:0xc0)
= 2019.10.03 iucode_date(fname:intel/06-4e-03;cpuid:000406e3;pf_mask:0xc0;segment:"Mobile";codename:"Skylake_U";stepping:"D0";pf_model:0xc0)
= 2019.10.03 iucode_date(fname:intel/06-4e-03;cpuid:000406e3;pf_mask:0xc0;segment:"Mobile";codename:"Skylake_Y";stepping:"D0";pf_model:0xc0)
= 2021.05.19 iucode_date(fname:intel-06-4f-01/06-4f-01;cpuid:000406f1;pf_mask:0xef)
= 2021.05.19 iucode_date(fname:intel-06-4f-01/06-4f-01;cpuid:000406f1;pf_mask:0xef;segment:"Desktop";codename:"Broadwell_E";stepping:"B0";pf_model:0xef)
= 2021.05.19 iucode_date(fname:intel-06-4f-01/06-4f-01;cpuid:000406f1;pf_mask:0xef;segment:"Desktop";codename:"Broadwell_E";stepping:"M0";pf_model:0xef)
= 2021.05.19 iucode_date(fname:intel-06-4f-01/06-4f-01;cpuid:000406f1;pf_mask:0xef;segment:"Desktop";codename:"Broadwell_E";stepping:"R0";pf_model:0xef)
= 2021.05.19 iucode_date(fname:intel-06-4f-01/06-4f-01;cpuid:000406f1;pf_mask:0xef;segment:"Desktop";codename:"Broadwell";stepping:"B0";pf_model:0xef)
= 2021.05.19 iucode_date(fname:intel-06-4f-01/06-4f-01;cpuid:000406f1;pf_mask:0xef;segment:"Desktop";codename:"Broadwell";stepping:"M0";pf_model:0xef)
= 2021.05.19 iucode_date(fname:intel-06-4f-01/06-4f-01;cpuid:000406f1;pf_mask:0xef;segment:"Desktop";codename:"Broadwell";stepping:"R0";pf_model:0xef)
= 2021.05.19 iucode_date(fname:intel-06-4f-01/06-4f-01;cpuid:000406f1;pf_mask:0xef;segment:"Server";codename:"Broadwell_EP";stepping:"B0";pf_model:0xef)
= 2021.05.19 iucode_date(fname:intel-06-4f-01/06-4f-01;cpuid:000406f1;pf_mask:0xef;segment:"Server";codename:"Broadwell_EP";stepping:"M0";pf_model:0xef)
= 2021.05.19 iucode_date(fname:intel-06-4f-01/06-4f-01;cpuid:000406f1;pf_mask:0xef;segment:"Server";codename:"Broadwell_EP";stepping:"R0";pf_model:0xef)
= 2021.05.19 iucode_date(fname:intel-06-4f-01/06-4f-01;cpuid:000406f1;pf_mask:0xef;segment:"Server";codename:"Broadwell_EX";stepping:"B0";pf_model:0xef)
= 2021.05.19 iucode_date(fname:intel-06-4f-01/06-4f-01;cpuid:000406f1;pf_mask:0xef;segment:"Server";codename:"Broadwell_EX";stepping:"M0";pf_model:0xef)
= 2021.05.19 iucode_date(fname:intel-06-4f-01/06-4f-01;cpuid:000406f1;pf_mask:0xef;segment:"Server";codename:"Broadwell_EX";stepping:"R0";pf_model:0xef)
= 2021.05.19 iucode_date(fname:intel-06-4f-01/06-4f-01;cpuid:000406f1;pf_mask:0xef;segment:"Server";codename:"Broadwell_ML";stepping:"B0";pf_model:0xef)
= 2021.05.19 iucode_date(fname:intel-06-4f-01/06-4f-01;cpuid:000406f1;pf_mask:0xef;segment:"Server";codename:"Broadwell_ML";stepping:"M0";pf_model:0xef)
= 2021.05.19 iucode_date(fname:intel-06-4f-01/06-4f-01;cpuid:000406f1;pf_mask:0xef;segment:"Server";codename:"Broadwell_ML";stepping:"R0";pf_model:0xef)
= 2021.05.19 iucode_date(fname:intel-06-4f-01/06-4f-01;cpuid:000406f1;pf_mask:0xef;segment:"Server";codename:"Broadwell";stepping:"B0";pf_model:0xef)
= 2021.05.19 iucode_date(fname:intel-06-4f-01/06-4f-01;cpuid:000406f1;pf_mask:0xef;segment:"Server";codename:"Broadwell";stepping:"M0";pf_model:0xef)
= 2021.05.19 iucode_date(fname:intel-06-4f-01/06-4f-01;cpuid:000406f1;pf_mask:0xef;segment:"Server";codename:"Broadwell";stepping:"R0";pf_model:0xef)
= 2022.08.30 iucode_date(fname:intel/06-55-03;cpuid:00050653;pf_mask:0x97)
= 2022.08.30 iucode_date(fname:intel/06-55-03;cpuid:00050653;pf_mask:0x97;segment:"Server";codename:"Skylake_SP";stepping:"B1";pf_model:0x97)
= 2022.08.30 iucode_date(fname:intel/06-55-03;cpuid:00050653;pf_mask:0x97;segment:"Server";codename:"Skylake";stepping:"B1";pf_model:0x97)
= 2022.03.08 iucode_date(fname:intel-06-55-04/06-55-04;cpuid:00050654;pf_mask:0xb7)
= 2022.03.08 iucode_date(fname:intel-06-55-04/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Desktop";codename:"Skylake";stepping:"H0";pf_model:0xb7)
= 2022.03.08 iucode_date(fname:intel-06-55-04/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Desktop";codename:"Skylake";stepping:"M0";pf_model:0xb7)
= 2022.03.08 iucode_date(fname:intel-06-55-04/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Desktop";codename:"Skylake";stepping:"U0";pf_model:0xb7)
= 2022.03.08 iucode_date(fname:intel-06-55-04/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Desktop";codename:"Skylake_X";stepping:"H0";pf_model:0xb7)
= 2022.03.08 iucode_date(fname:intel-06-55-04/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Desktop";codename:"Skylake_X";stepping:"M0";pf_model:0xb7)
= 2022.03.08 iucode_date(fname:intel-06-55-04/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Desktop";codename:"Skylake_X";stepping:"U0";pf_model:0xb7)
= 2022.03.08 iucode_date(fname:intel-06-55-04/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake_D";stepping:"M1";pf_model:0xb7)
= 2022.03.08 iucode_date(fname:intel-06-55-04/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake_SP";stepping:"H0";pf_model:0xb7)
= 2022.03.08 iucode_date(fname:intel-06-55-04/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake_SP";stepping:"M0";pf_model:0xb7)
= 2022.03.08 iucode_date(fname:intel-06-55-04/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake_SP";stepping:"U0";pf_model:0xb7)
= 2022.03.08 iucode_date(fname:intel-06-55-04/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake";stepping:"H0";pf_model:0xb7)
= 2022.03.08 iucode_date(fname:intel-06-55-04/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake";stepping:"M0";pf_model:0xb7)
= 2022.03.08 iucode_date(fname:intel-06-55-04/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake";stepping:"M1";pf_model:0xb7)
= 2022.03.08 iucode_date(fname:intel-06-55-04/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake";stepping:"U0";pf_model:0xb7)
= 2022.03.08 iucode_date(fname:intel-06-55-04/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake_W";stepping:"H0";pf_model:0xb7)
= 2022.03.08 iucode_date(fname:intel-06-55-04/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake_W";stepping:"M0";pf_model:0xb7)
= 2022.03.08 iucode_date(fname:intel-06-55-04/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake_W";stepping:"U0";pf_model:0xb7)
= 2019.07.31 iucode_date(fname:intel/06-55-04;cpuid:00050654;pf_mask:0xb7)
= 2019.07.31 iucode_date(fname:intel/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Desktop";codename:"Skylake";stepping:"H0";pf_model:0xb7)
= 2019.07.31 iucode_date(fname:intel/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Desktop";codename:"Skylake";stepping:"M0";pf_model:0xb7)
= 2019.07.31 iucode_date(fname:intel/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Desktop";codename:"Skylake";stepping:"U0";pf_model:0xb7)
= 2019.07.31 iucode_date(fname:intel/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Desktop";codename:"Skylake_X";stepping:"H0";pf_model:0xb7)
= 2019.07.31 iucode_date(fname:intel/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Desktop";codename:"Skylake_X";stepping:"M0";pf_model:0xb7)
= 2019.07.31 iucode_date(fname:intel/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Desktop";codename:"Skylake_X";stepping:"U0";pf_model:0xb7)
= 2019.07.31 iucode_date(fname:intel/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake_D";stepping:"M1";pf_model:0xb7)
= 2019.07.31 iucode_date(fname:intel/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake_SP";stepping:"H0";pf_model:0xb7)
= 2019.07.31 iucode_date(fname:intel/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake_SP";stepping:"M0";pf_model:0xb7)
= 2019.07.31 iucode_date(fname:intel/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake_SP";stepping:"U0";pf_model:0xb7)
= 2019.07.31 iucode_date(fname:intel/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake";stepping:"H0";pf_model:0xb7)
= 2019.07.31 iucode_date(fname:intel/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake";stepping:"M0";pf_model:0xb7)
= 2019.07.31 iucode_date(fname:intel/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake";stepping:"M1";pf_model:0xb7)
= 2019.07.31 iucode_date(fname:intel/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake";stepping:"U0";pf_model:0xb7)
= 2019.07.31 iucode_date(fname:intel/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake_W";stepping:"H0";pf_model:0xb7)
= 2019.07.31 iucode_date(fname:intel/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake_W";stepping:"M0";pf_model:0xb7)
= 2019.07.31 iucode_date(fname:intel/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake_W";stepping:"U0";pf_model:0xb7)
= 2018.11.16 iucode_date(fname:intel/06-55-05;cpuid:00050655;pf_mask:0xb7)
= 2018.11.16 iucode_date(fname:intel/06-55-05;cpuid:00050655;pf_mask:0xb7;segment:"Server";codename:"Cascade_Lake_SP";stepping:"A0";pf_model:0xb7)
= 2018.11.16 iucode_date(fname:intel/06-55-05;cpuid:00050655;pf_mask:0xb7;segment:"Server";codename:"Cascade_Lake";stepping:"A0";pf_model:0xb7)
= 2022.08.26 iucode_date(fname:intel/06-55-06;cpuid:00050656;pf_mask:0xbf)
= 2022.08.26 iucode_date(fname:intel/06-55-06;cpuid:00050656;pf_mask:0xbf;segment:"Server";codename:"Cascade_Lake_SP";stepping:"B0";pf_model:0xbf)
= 2022.08.26 iucode_date(fname:intel/06-55-06;cpuid:00050656;pf_mask:0xbf;segment:"Server";codename:"Cascade_Lake";stepping:"B0";pf_model:0xbf)
= 2022.08.26 iucode_date(fname:intel/06-55-07;cpuid:00050657;pf_mask:0xbf)
= 2022.08.26 iucode_date(fname:intel/06-55-07;cpuid:00050657;pf_mask:0xbf;segment:"Desktop";codename:"Cascade_Lake";stepping:"B1";pf_model:0xbf)
= 2022.08.26 iucode_date(fname:intel/06-55-07;cpuid:00050657;pf_mask:0xbf;segment:"Desktop";codename:"Cascade_Lake";stepping:"L1";pf_model:0xbf)
= 2022.08.26 iucode_date(fname:intel/06-55-07;cpuid:00050657;pf_mask:0xbf;segment:"Desktop";codename:"Cascade_Lake_X";stepping:"B1";pf_model:0xbf)
= 2022.08.26 iucode_date(fname:intel/06-55-07;cpuid:00050657;pf_mask:0xbf;segment:"Desktop";codename:"Cascade_Lake_X";stepping:"L1";pf_model:0xbf)
= 2022.08.26 iucode_date(fname:intel/06-55-07;cpuid:00050657;pf_mask:0xbf;segment:"Server";codename:"Cascade_Lake_SP";stepping:"B1";pf_model:0xbf)
= 2022.08.26 iucode_date(fname:intel/06-55-07;cpuid:00050657;pf_mask:0xbf;segment:"Server";codename:"Cascade_Lake_SP";stepping:"L1";pf_model:0xbf)
= 2022.08.26 iucode_date(fname:intel/06-55-07;cpuid:00050657;pf_mask:0xbf;segment:"Server";codename:"Cascade_Lake";stepping:"B1";pf_model:0xbf)
= 2022.08.26 iucode_date(fname:intel/06-55-07;cpuid:00050657;pf_mask:0xbf;segment:"Server";codename:"Cascade_Lake";stepping:"L1";pf_model:0xbf)
= 2022.08.26 iucode_date(fname:intel/06-55-07;cpuid:00050657;pf_mask:0xbf;segment:"Server";codename:"Cascade_Lake_W";stepping:"B1";pf_model:0xbf)
= 2022.08.26 iucode_date(fname:intel/06-55-07;cpuid:00050657;pf_mask:0xbf;segment:"Server";codename:"Cascade_Lake_W";stepping:"L1";pf_model:0xbf)
= 2022.08.26 iucode_date(fname:intel/06-55-0b;cpuid:0005065b;pf_mask:0xbf)
= 2022.08.26 iucode_date(fname:intel/06-55-0b;cpuid:0005065b;pf_mask:0xbf;segment:"Server";codename:"Cooper_Lake_SP";stepping:"A1";pf_model:0xbf)
= 2022.08.26 iucode_date(fname:intel/06-55-0b;cpuid:0005065b;pf_mask:0xbf;segment:"Server";codename:"Cooper_Lake";stepping:"A1";pf_model:0xbf)
= 2019.06.17 iucode_date(fname:intel/06-56-02;cpuid:00050662;pf_mask:0x10)
= 2019.06.17 iucode_date(fname:intel/06-56-02;cpuid:00050662;pf_mask:0x10;segment:"Server";codename:"Broadwell_DE";stepping:"V1";pf_model:0x10)
= 2019.06.17 iucode_date(fname:intel/06-56-02;cpuid:00050662;pf_mask:0x10;segment:"Server";codename:"Broadwell";stepping:"V1";pf_model:0x10)
= 2021.06.12 iucode_date(fname:intel/06-56-03;cpuid:00050663;pf_mask:0x10)
= 2021.06.12 iucode_date(fname:intel/06-56-03;cpuid:00050663;pf_mask:0x10;segment:"Server";codename:"Broadwell_DE";stepping:"V2";pf_model:0x10)
= 2021.06.12 iucode_date(fname:intel/06-56-03;cpuid:00050663;pf_mask:0x10;segment:"Server";codename:"Broadwell_DE";stepping:"V3";pf_model:0x10)
= 2021.06.12 iucode_date(fname:intel/06-56-03;cpuid:00050663;pf_mask:0x10;segment:"Server";codename:"Broadwell";stepping:"V2";pf_model:0x10)
= 2021.06.12 iucode_date(fname:intel/06-56-03;cpuid:00050663;pf_mask:0x10;segment:"Server";codename:"Broadwell";stepping:"V3";pf_model:0x10)
= 2021.06.12 iucode_date(fname:intel/06-56-04;cpuid:00050664;pf_mask:0x10)
= 2021.06.12 iucode_date(fname:intel/06-56-04;cpuid:00050664;pf_mask:0x10;segment:"Server";codename:"Broadwell_DE";stepping:"Y0";pf_model:0x10)
= 2021.06.12 iucode_date(fname:intel/06-56-04;cpuid:00050664;pf_mask:0x10;segment:"Server";codename:"Broadwell";stepping:"Y0";pf_model:0x10)
= 2021.09.18 iucode_date(fname:intel/06-56-05;cpuid:00050665;pf_mask:0x10)
= 2021.09.18 iucode_date(fname:intel/06-56-05;cpuid:00050665;pf_mask:0x10;segment:"Server";codename:"Broadwell_NS";stepping:"A0";pf_model:0x10)
= 2021.09.18 iucode_date(fname:intel/06-56-05;cpuid:00050665;pf_mask:0x10;segment:"Server";codename:"Broadwell_NS";stepping:"A1";pf_model:0x10)
= 2021.09.18 iucode_date(fname:intel/06-56-05;cpuid:00050665;pf_mask:0x10;segment:"Server";codename:"Broadwell";stepping:"A0";pf_model:0x10)
= 2021.09.18 iucode_date(fname:intel/06-56-05;cpuid:00050665;pf_mask:0x10;segment:"Server";codename:"Broadwell";stepping:"A1";pf_model:0x10)
= 2021.09.18 iucode_date(fname:intel/06-56-05;cpuid:00050665;pf_mask:0x10;segment:"Server";codename:"Hewitt_Lake_[Broadwell]";stepping:"A1";pf_model:0x10)
= 2018.05.11 iucode_date(fname:intel/06-5c-02;cpuid:000506c2;pf_mask:0x1)
= 2018.05.11 iucode_date(fname:intel/06-5c-02;cpuid:000506c2;pf_mask:0x1;segment:"SOC";codename:"Broxton";stepping:"C0";pf_model:0x1)
= 2021.11.16 iucode_date(fname:intel/06-5c-09;cpuid:000506c9;pf_mask:0x3)
= 2021.11.16 iucode_date(fname:intel/06-5c-09;cpuid:000506c9;pf_mask:0x3;segment:"SOC";codename:"Apollo_Lake";stepping:"D0";pf_model:0x3)
= 2021.11.16 iucode_date(fname:intel/06-5c-0a;cpuid:000506ca;pf_mask:0x3)
= 2021.11.16 iucode_date(fname:intel/06-5c-0a;cpuid:000506ca;pf_mask:0x3;segment:"SOC";codename:"Apollo_Lake";stepping:"B1";pf_model:0x3)
= 2021.11.16 iucode_date(fname:intel/06-5c-0a;cpuid:000506ca;pf_mask:0x3;segment:"SOC";codename:"Apollo_Lake";stepping:"F1";pf_model:0x3)
= 2021.11.12 iucode_date(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36)
= 2021.11.12 iucode_date(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Desktop";codename:"Skylake_S";stepping:"N0";pf_model:0x36)
= 2021.11.12 iucode_date(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Desktop";codename:"Skylake_S";stepping:"R0";pf_model:0x36)
= 2021.11.12 iucode_date(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Desktop";codename:"Skylake_S";stepping:"S0";pf_model:0x36)
= 2021.11.12 iucode_date(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Desktop";codename:"Skylake";stepping:"N0";pf_model:0x36)
= 2021.11.12 iucode_date(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Desktop";codename:"Skylake";stepping:"R0";pf_model:0x36)
= 2021.11.12 iucode_date(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Desktop";codename:"Skylake";stepping:"S0";pf_model:0x36)
= 2021.11.12 iucode_date(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Mobile";codename:"Skylake_H";stepping:"N0";pf_model:0x36)
= 2021.11.12 iucode_date(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Mobile";codename:"Skylake_H";stepping:"R0";pf_model:0x36)
= 2021.11.12 iucode_date(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Mobile";codename:"Skylake_H";stepping:"S0";pf_model:0x36)
= 2021.11.12 iucode_date(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Mobile";codename:"Skylake";stepping:"N0";pf_model:0x36)
= 2021.11.12 iucode_date(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Mobile";codename:"Skylake";stepping:"R0";pf_model:0x36)
= 2021.11.12 iucode_date(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Mobile";codename:"Skylake";stepping:"S0";pf_model:0x36)
= 2021.11.12 iucode_date(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Server";codename:"Skylake";stepping:"N0";pf_model:0x36)
= 2021.11.12 iucode_date(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Server";codename:"Skylake";stepping:"R0";pf_model:0x36)
= 2021.11.12 iucode_date(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Server";codename:"Skylake";stepping:"S0";pf_model:0x36)
= 2021.11.12 iucode_date(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Server";codename:"Skylake_Xeon_E3";stepping:"N0";pf_model:0x36)
= 2021.11.12 iucode_date(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Server";codename:"Skylake_Xeon_E3";stepping:"R0";pf_model:0x36)
= 2021.11.12 iucode_date(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Server";codename:"Skylake_Xeon_E3";stepping:"S0";pf_model:0x36)
= 2019.10.03 iucode_date(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36)
= 2019.10.03 iucode_date(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Desktop";codename:"Skylake_S";stepping:"N0";pf_model:0x36)
= 2019.10.03 iucode_date(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Desktop";codename:"Skylake_S";stepping:"R0";pf_model:0x36)
= 2019.10.03 iucode_date(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Desktop";codename:"Skylake_S";stepping:"S0";pf_model:0x36)
= 2019.10.03 iucode_date(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Desktop";codename:"Skylake";stepping:"N0";pf_model:0x36)
= 2019.10.03 iucode_date(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Desktop";codename:"Skylake";stepping:"R0";pf_model:0x36)
= 2019.10.03 iucode_date(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Desktop";codename:"Skylake";stepping:"S0";pf_model:0x36)
= 2019.10.03 iucode_date(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Mobile";codename:"Skylake_H";stepping:"N0";pf_model:0x36)
= 2019.10.03 iucode_date(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Mobile";codename:"Skylake_H";stepping:"R0";pf_model:0x36)
= 2019.10.03 iucode_date(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Mobile";codename:"Skylake_H";stepping:"S0";pf_model:0x36)
= 2019.10.03 iucode_date(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Mobile";codename:"Skylake";stepping:"N0";pf_model:0x36)
= 2019.10.03 iucode_date(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Mobile";codename:"Skylake";stepping:"R0";pf_model:0x36)
= 2019.10.03 iucode_date(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Mobile";codename:"Skylake";stepping:"S0";pf_model:0x36)
= 2019.10.03 iucode_date(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Server";codename:"Skylake";stepping:"N0";pf_model:0x36)
= 2019.10.03 iucode_date(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Server";codename:"Skylake";stepping:"R0";pf_model:0x36)
= 2019.10.03 iucode_date(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Server";codename:"Skylake";stepping:"S0";pf_model:0x36)
= 2019.10.03 iucode_date(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Server";codename:"Skylake_Xeon_E3";stepping:"N0";pf_model:0x36)
= 2019.10.03 iucode_date(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Server";codename:"Skylake_Xeon_E3";stepping:"R0";pf_model:0x36)
= 2019.10.03 iucode_date(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Server";codename:"Skylake_Xeon_E3";stepping:"S0";pf_model:0x36)
= 2021.12.02 iucode_date(fname:intel/06-5f-01;cpuid:000506f1;pf_mask:0x1)
= 2021.12.02 iucode_date(fname:intel/06-5f-01;cpuid:000506f1;pf_mask:0x1;segment:"SOC";codename:"Denverton";stepping:"B0";pf_model:0x1)
= 2018.04.17 iucode_date(fname:intel/06-66-03;cpuid:00060663;pf_mask:0x80)
= 2018.04.17 iucode_date(fname:intel/06-66-03;cpuid:00060663;pf_mask:0x80;segment:"Mobile";codename:"Cannon_Lake";stepping:"D0";pf_model:0x80)
= 2018.04.17 iucode_date(fname:intel/06-66-03;cpuid:00060663;pf_mask:0x80;segment:"Mobile";codename:"Cannon_Lake_U";stepping:"D0";pf_model:0x80)
= 2021.03.08 iucode_date(fname:intel/06-6a-05;cpuid:000606a5;pf_mask:0x87)
= 2021.03.08 iucode_date(fname:intel/06-6a-05;cpuid:000606a5;pf_mask:0x87;segment:"Server";codename:"Ice_Lake_SP";stepping:"C0";pf_model:0x87)
= 2021.03.08 iucode_date(fname:intel/06-6a-05;cpuid:000606a5;pf_mask:0x87;segment:"Server";codename:"Ice_Lake";stepping:"C0";pf_model:0x87)
= 2022.10.09 iucode_date(fname:intel/06-6a-06;cpuid:000606a6;pf_mask:0x87)
= 2022.10.09 iucode_date(fname:intel/06-6a-06;cpuid:000606a6;pf_mask:0x87;segment:"Server";codename:"Ice_Lake_SP";stepping:"D0";pf_model:0x87)
= 2022.10.09 iucode_date(fname:intel/06-6a-06;cpuid:000606a6;pf_mask:0x87;segment:"Server";codename:"Ice_Lake";stepping:"D0";pf_model:0x87)
= 2022.09.23 iucode_date(fname:intel/06-6c-01;cpuid:000606c1;pf_mask:0x10)
= 2022.09.23 iucode_date(fname:intel/06-6c-01;cpuid:000606c1;pf_mask:0x10;segment:"Server";codename:"Ice_Lake_D";stepping:"B0";pf_model:0x10)
= 2022.09.23 iucode_date(fname:intel/06-6c-01;cpuid:000606c1;pf_mask:0x10;segment:"Server";codename:"Ice_Lake";stepping:"B0";pf_model:0x10)
= 2022.09.16 iucode_date(fname:intel/06-7a-01;cpuid:000706a1;pf_mask:0x1)
= 2022.09.16 iucode_date(fname:intel/06-7a-01;cpuid:000706a1;pf_mask:0x1;segment:"SOC";codename:"Gemini_Lake";stepping:"B0";pf_model:0x1)
= 2022.09.20 iucode_date(fname:intel/06-7a-08;cpuid:000706a8;pf_mask:0x1)
= 2022.09.20 iucode_date(fname:intel/06-7a-08;cpuid:000706a8;pf_mask:0x1;segment:"SOC";codename:"Gemini_Lake_R";stepping:"R0";pf_model:0x1)
= 2022.09.20 iucode_date(fname:intel/06-7a-08;cpuid:000706a8;pf_mask:0x1;segment:"SOC";codename:"Gemini_Lake";stepping:"R0";pf_model:0x1)
= 2022.08.31 iucode_date(fname:intel/06-7e-05;cpuid:000706e5;pf_mask:0x80)
= 2022.08.31 iucode_date(fname:intel/06-7e-05;cpuid:000706e5;pf_mask:0x80;segment:"Mobile";codename:"Ice_Lake";stepping:"D1";pf_model:0x80)
= 2022.08.31 iucode_date(fname:intel/06-7e-05;cpuid:000706e5;pf_mask:0x80;segment:"Mobile";codename:"Ice_Lake_U";stepping:"D1";pf_model:0x80)
= 2022.08.31 iucode_date(fname:intel/06-7e-05;cpuid:000706e5;pf_mask:0x80;segment:"Mobile";codename:"Ice_Lake_Y";stepping:"D1";pf_model:0x80)
= 2022.09.07 iucode_date(fname:intel/06-8a-01;cpuid:000806a1;pf_mask:0x10)
= 2022.09.07 iucode_date(fname:intel/06-8a-01;cpuid:000806a1;pf_mask:0x10;segment:"SOC";codename:"Lakefield";stepping:"B2";pf_model:0x10)
= 2022.09.07 iucode_date(fname:intel/06-8a-01;cpuid:000806a1;pf_mask:0x10;segment:"SOC";codename:"Lakefield";stepping:"B3";pf_model:0x10)
= 2022.06.28 iucode_date(fname:intel-06-8c-01/06-8c-01;cpuid:000806c1;pf_mask:0x80)
= 2022.06.28 iucode_date(fname:intel-06-8c-01/06-8c-01;cpuid:000806c1;pf_mask:0x80;segment:"Mobile";codename:"Tiger_Lake";stepping:"B1";pf_model:0x80)
= 2022.06.28 iucode_date(fname:intel-06-8c-01/06-8c-01;cpuid:000806c1;pf_mask:0x80;segment:"Mobile";codename:"Tiger_Lake_UP3";stepping:"B1";pf_model:0x80)
= 2022.06.28 iucode_date(fname:intel-06-8c-01/06-8c-01;cpuid:000806c1;pf_mask:0x80;segment:"Mobile";codename:"Tiger_Lake_UP4";stepping:"B1";pf_model:0x80)
= 2022.03.19 iucode_date(fname:intel/06-8c-02;cpuid:000806c2;pf_mask:0xc2)
= 2022.03.19 iucode_date(fname:intel/06-8c-02;cpuid:000806c2;pf_mask:0xc2;segment:"Mobile";codename:"Tiger_Lake_Refresh_R";stepping:"C0";pf_model:0x80)
= 2022.03.19 iucode_date(fname:intel/06-8c-02;cpuid:000806c2;pf_mask:0xc2;segment:"Mobile";codename:"Tiger_Lake_Refresh";stepping:"C0";pf_model:0x80)
= 2022.06.28 iucode_date(fname:intel/06-8d-01;cpuid:000806d1;pf_mask:0xc2)
= 2022.06.28 iucode_date(fname:intel/06-8d-01;cpuid:000806d1;pf_mask:0xc2;segment:"Mobile";codename:"Tiger_Lake_H";stepping:"R0";pf_model:0xc2)
= 2022.06.28 iucode_date(fname:intel/06-8d-01;cpuid:000806d1;pf_mask:0xc2;segment:"Mobile";codename:"Tiger_Lake";stepping:"R0";pf_model:0xc2)
= 2021.11.12 iucode_date(fname:intel/06-8e-09;cpuid:000806e9;pf_mask:0x10)
= 2021.11.12 iucode_date(fname:intel/06-8e-09;cpuid:000806e9;pf_mask:0x10;segment:"Mobile";codename:"Amber_Lake";stepping:"H0";pf_model:0x10)
= 2021.11.12 iucode_date(fname:intel/06-8e-09;cpuid:000806e9;pf_mask:0x10;segment:"Mobile";codename:"Amber_Lake_Y_2+2";stepping:"H0";pf_model:0x10)
= 2021.11.12 iucode_date(fname:intel/06-8e-09;cpuid:000806e9;pf_mask:0xc0)
= 2021.11.12 iucode_date(fname:intel/06-8e-09;cpuid:000806e9;pf_mask:0xc0;segment:"Mobile";codename:"Kaby_Lake";stepping:"H0";pf_model:0xc0)
= 2021.11.12 iucode_date(fname:intel/06-8e-09;cpuid:000806e9;pf_mask:0xc0;segment:"Mobile";codename:"Kaby_Lake";stepping:"J1";pf_model:0xc0)
= 2021.11.12 iucode_date(fname:intel/06-8e-09;cpuid:000806e9;pf_mask:0xc0;segment:"Mobile";codename:"Kaby_Lake_U_2+3e";stepping:"J1";pf_model:0xc0)
= 2021.11.12 iucode_date(fname:intel/06-8e-09;cpuid:000806e9;pf_mask:0xc0;segment:"Mobile";codename:"Kaby_Lake_U";stepping:"H0";pf_model:0xc0)
= 2021.11.12 iucode_date(fname:intel/06-8e-09;cpuid:000806e9;pf_mask:0xc0;segment:"Mobile";codename:"Kaby_Lake_Y";stepping:"H0";pf_model:0xc0)
= 2021.11.12 iucode_date(fname:intel/06-8e-0a;cpuid:000806ea;pf_mask:0xc0)
= 2021.11.12 iucode_date(fname:intel/06-8e-0a;cpuid:000806ea;pf_mask:0xc0;segment:"Mobile";codename:"Coffee_Lake";stepping:"D0";pf_model:0xc0)
= 2021.11.12 iucode_date(fname:intel/06-8e-0a;cpuid:000806ea;pf_mask:0xc0;segment:"Mobile";codename:"Coffee_Lake_U_4+3e";stepping:"D0";pf_model:0xc0)
= 2021.11.12 iucode_date(fname:intel/06-8e-0a;cpuid:000806ea;pf_mask:0xc0;segment:"Mobile";codename:"Kaby_Lake_R";stepping:"Y0";pf_model:0xc0)
= 2021.11.12 iucode_date(fname:intel/06-8e-0a;cpuid:000806ea;pf_mask:0xc0;segment:"Mobile";codename:"Kaby_Lake";stepping:"Y0";pf_model:0xc0)
= 2021.11.15 iucode_date(fname:intel/06-8e-0b;cpuid:000806eb;pf_mask:0xd0)
= 2021.11.15 iucode_date(fname:intel/06-8e-0b;cpuid:000806eb;pf_mask:0xd0;segment:"Mobile";codename:"Whiskey_Lake";stepping:"W0";pf_model:0xd0)
= 2021.11.15 iucode_date(fname:intel/06-8e-0b;cpuid:000806eb;pf_mask:0xd0;segment:"Mobile";codename:"Whiskey_Lake_U";stepping:"W0";pf_model:0xd0)
= 2022.07.31 iucode_date(fname:intel/06-8e-0c;cpuid:000806ec;pf_mask:0x94)
= 2022.07.31 iucode_date(fname:intel/06-8e-0c;cpuid:000806ec;pf_mask:0x94;segment:"Mobile";codename:"Amber_Lake";stepping:"V0";pf_model:0x94)
= 2022.07.31 iucode_date(fname:intel/06-8e-0c;cpuid:000806ec;pf_mask:0x94;segment:"Mobile";codename:"Amber_Lake_Y_4+2";stepping:"V0";pf_model:0x94)
= 2022.07.31 iucode_date(fname:intel/06-8e-0c;cpuid:000806ec;pf_mask:0x94;segment:"Mobile";codename:"Comet_Lake";stepping:"V0";pf_model:0x94)
= 2022.07.31 iucode_date(fname:intel/06-8e-0c;cpuid:000806ec;pf_mask:0x94;segment:"Mobile";codename:"Comet_Lake_U_4+2";stepping:"V0";pf_model:0x94)
= 2022.07.31 iucode_date(fname:intel/06-8e-0c;cpuid:000806ec;pf_mask:0x94;segment:"Mobile";codename:"Whiskey_Lake";stepping:"V0";pf_model:0x94)
= 2022.07.31 iucode_date(fname:intel/06-8e-0c;cpuid:000806ec;pf_mask:0x94;segment:"Mobile";codename:"Whiskey_Lake_U";stepping:"V0";pf_model:0x94)
= 2022.12.19 iucode_date(fname:intel/06-8f-04;cpuid:000806f4;pf_mask:0x10)
= 2022.12.27 iucode_date(fname:intel/06-8f-04;cpuid:000806f4;pf_mask:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-04;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E0";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-04;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S1";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-04;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E0";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-04;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S1";pf_model:0x87)
= 2022.12.19 iucode_date(fname:intel/06-8f-04;cpuid:000806f5;pf_mask:0x10)
= 2022.12.19 iucode_date(fname:intel/06-8f-04;cpuid:000806f5;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids_HBM";stepping:"B1";pf_model:0x10)
= 2022.12.19 iucode_date(fname:intel/06-8f-04;cpuid:000806f5;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids";stepping:"B1";pf_model:0x10)
= 2022.12.27 iucode_date(fname:intel/06-8f-04;cpuid:000806f5;pf_mask:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-04;cpuid:000806f5;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E2";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-04;cpuid:000806f5;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E2";pf_model:0x87)
= 2022.12.19 iucode_date(fname:intel/06-8f-04;cpuid:000806f6;pf_mask:0x10)
= 2022.12.27 iucode_date(fname:intel/06-8f-04;cpuid:000806f6;pf_mask:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-04;cpuid:000806f6;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E3";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-04;cpuid:000806f6;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E3";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-04;cpuid:000806f7;pf_mask:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-04;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E4";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-04;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S2";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-04;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E4";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-04;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S2";pf_model:0x87)
= 2022.12.19 iucode_date(fname:intel/06-8f-04;cpuid:000806f8;pf_mask:0x10)
= 2022.12.19 iucode_date(fname:intel/06-8f-04;cpuid:000806f8;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids_HBM";stepping:"B3";pf_model:0x10)
= 2022.12.19 iucode_date(fname:intel/06-8f-04;cpuid:000806f8;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids";stepping:"B3";pf_model:0x10)
= 2022.12.27 iucode_date(fname:intel/06-8f-04;cpuid:000806f8;pf_mask:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-04;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E5";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-04;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S3";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-04;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E5";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-04;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S3";pf_model:0x87)
= 2022.12.19 iucode_date(fname:intel/06-8f-05;cpuid:000806f4;pf_mask:0x10)
= 2022.12.27 iucode_date(fname:intel/06-8f-05;cpuid:000806f4;pf_mask:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-05;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E0";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-05;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S1";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-05;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E0";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-05;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S1";pf_model:0x87)
= 2022.12.19 iucode_date(fname:intel/06-8f-05;cpuid:000806f5;pf_mask:0x10)
= 2022.12.19 iucode_date(fname:intel/06-8f-05;cpuid:000806f5;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids_HBM";stepping:"B1";pf_model:0x10)
= 2022.12.19 iucode_date(fname:intel/06-8f-05;cpuid:000806f5;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids";stepping:"B1";pf_model:0x10)
= 2022.12.27 iucode_date(fname:intel/06-8f-05;cpuid:000806f5;pf_mask:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-05;cpuid:000806f5;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E2";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-05;cpuid:000806f5;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E2";pf_model:0x87)
= 2022.12.19 iucode_date(fname:intel/06-8f-05;cpuid:000806f6;pf_mask:0x10)
= 2022.12.27 iucode_date(fname:intel/06-8f-05;cpuid:000806f6;pf_mask:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-05;cpuid:000806f6;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E3";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-05;cpuid:000806f6;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E3";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-05;cpuid:000806f7;pf_mask:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-05;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E4";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-05;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S2";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-05;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E4";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-05;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S2";pf_model:0x87)
= 2022.12.19 iucode_date(fname:intel/06-8f-05;cpuid:000806f8;pf_mask:0x10)
= 2022.12.19 iucode_date(fname:intel/06-8f-05;cpuid:000806f8;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids_HBM";stepping:"B3";pf_model:0x10)
= 2022.12.19 iucode_date(fname:intel/06-8f-05;cpuid:000806f8;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids";stepping:"B3";pf_model:0x10)
= 2022.12.27 iucode_date(fname:intel/06-8f-05;cpuid:000806f8;pf_mask:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-05;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E5";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-05;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S3";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-05;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E5";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-05;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S3";pf_model:0x87)
= 2022.12.19 iucode_date(fname:intel/06-8f-06;cpuid:000806f4;pf_mask:0x10)
= 2022.12.27 iucode_date(fname:intel/06-8f-06;cpuid:000806f4;pf_mask:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-06;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E0";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-06;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S1";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-06;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E0";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-06;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S1";pf_model:0x87)
= 2022.12.19 iucode_date(fname:intel/06-8f-06;cpuid:000806f5;pf_mask:0x10)
= 2022.12.19 iucode_date(fname:intel/06-8f-06;cpuid:000806f5;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids_HBM";stepping:"B1";pf_model:0x10)
= 2022.12.19 iucode_date(fname:intel/06-8f-06;cpuid:000806f5;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids";stepping:"B1";pf_model:0x10)
= 2022.12.27 iucode_date(fname:intel/06-8f-06;cpuid:000806f5;pf_mask:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-06;cpuid:000806f5;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E2";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-06;cpuid:000806f5;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E2";pf_model:0x87)
= 2022.12.19 iucode_date(fname:intel/06-8f-06;cpuid:000806f6;pf_mask:0x10)
= 2022.12.27 iucode_date(fname:intel/06-8f-06;cpuid:000806f6;pf_mask:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-06;cpuid:000806f6;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E3";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-06;cpuid:000806f6;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E3";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-06;cpuid:000806f7;pf_mask:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-06;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E4";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-06;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S2";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-06;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E4";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-06;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S2";pf_model:0x87)
= 2022.12.19 iucode_date(fname:intel/06-8f-06;cpuid:000806f8;pf_mask:0x10)
= 2022.12.19 iucode_date(fname:intel/06-8f-06;cpuid:000806f8;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids_HBM";stepping:"B3";pf_model:0x10)
= 2022.12.19 iucode_date(fname:intel/06-8f-06;cpuid:000806f8;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids";stepping:"B3";pf_model:0x10)
= 2022.12.27 iucode_date(fname:intel/06-8f-06;cpuid:000806f8;pf_mask:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-06;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E5";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-06;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S3";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-06;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E5";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-06;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S3";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-07;cpuid:000806f4;pf_mask:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-07;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E0";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-07;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S1";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-07;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E0";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-07;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S1";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-07;cpuid:000806f5;pf_mask:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-07;cpuid:000806f5;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E2";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-07;cpuid:000806f5;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E2";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-07;cpuid:000806f6;pf_mask:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-07;cpuid:000806f6;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E3";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-07;cpuid:000806f6;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E3";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-07;cpuid:000806f7;pf_mask:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-07;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E4";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-07;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S2";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-07;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E4";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-07;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S2";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-07;cpuid:000806f8;pf_mask:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-07;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E5";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-07;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S3";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-07;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E5";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-07;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S3";pf_model:0x87)
= 2022.12.19 iucode_date(fname:intel/06-8f-08;cpuid:000806f4;pf_mask:0x10)
= 2022.12.27 iucode_date(fname:intel/06-8f-08;cpuid:000806f4;pf_mask:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-08;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E0";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-08;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S1";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-08;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E0";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-08;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S1";pf_model:0x87)
= 2022.12.19 iucode_date(fname:intel/06-8f-08;cpuid:000806f5;pf_mask:0x10)
= 2022.12.19 iucode_date(fname:intel/06-8f-08;cpuid:000806f5;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids_HBM";stepping:"B1";pf_model:0x10)
= 2022.12.19 iucode_date(fname:intel/06-8f-08;cpuid:000806f5;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids";stepping:"B1";pf_model:0x10)
= 2022.12.27 iucode_date(fname:intel/06-8f-08;cpuid:000806f5;pf_mask:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-08;cpuid:000806f5;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E2";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-08;cpuid:000806f5;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E2";pf_model:0x87)
= 2022.12.19 iucode_date(fname:intel/06-8f-08;cpuid:000806f6;pf_mask:0x10)
= 2022.12.27 iucode_date(fname:intel/06-8f-08;cpuid:000806f6;pf_mask:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-08;cpuid:000806f6;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E3";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-08;cpuid:000806f6;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E3";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-08;cpuid:000806f7;pf_mask:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-08;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E4";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-08;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S2";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-08;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E4";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-08;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S2";pf_model:0x87)
= 2022.12.19 iucode_date(fname:intel/06-8f-08;cpuid:000806f8;pf_mask:0x10)
= 2022.12.19 iucode_date(fname:intel/06-8f-08;cpuid:000806f8;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids_HBM";stepping:"B3";pf_model:0x10)
= 2022.12.19 iucode_date(fname:intel/06-8f-08;cpuid:000806f8;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids";stepping:"B3";pf_model:0x10)
= 2022.12.27 iucode_date(fname:intel/06-8f-08;cpuid:000806f8;pf_mask:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-08;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E5";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-08;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S3";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-08;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E5";pf_model:0x87)
= 2022.12.27 iucode_date(fname:intel/06-8f-08;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S3";pf_model:0x87)
= 2022.07.15 iucode_date(fname:intel/06-96-01;cpuid:00090661;pf_mask:0x1)
= 2022.07.15 iucode_date(fname:intel/06-96-01;cpuid:00090661;pf_mask:0x1;segment:"SOC";codename:"Elkhart_Rate";stepping:"B1";pf_model:0x1)
= 2023.01.04 iucode_date(fname:intel/06-97-02;cpuid:00090672;pf_mask:0x7)
= 2023.01.04 iucode_date(fname:intel/06-97-02;cpuid:00090672;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake_S_8+8";stepping:"C0";pf_model:0x2)
= 2023.01.04 iucode_date(fname:intel/06-97-02;cpuid:00090672;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"C0";pf_model:0x2)
= 2023.01.04 iucode_date(fname:intel/06-97-02;cpuid:00090672;pf_mask:0x7;segment:"Mobile";codename:"Alder_Lake_HX";stepping:"C0";pf_model:0x3)
= 2023.01.04 iucode_date(fname:intel/06-97-02;cpuid:00090672;pf_mask:0x7;segment:"Mobile";codename:"Alder_Lake";stepping:"C0";pf_model:0x3)
= 2023.01.04 iucode_date(fname:intel/06-97-02;cpuid:00090675;pf_mask:0x7)
= 2023.01.04 iucode_date(fname:intel/06-97-02;cpuid:00090675;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake_S_6+0";stepping:"K0";pf_model:0x1)
= 2023.01.04 iucode_date(fname:intel/06-97-02;cpuid:00090675;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"K0";pf_model:0x1)
= 2023.01.04 iucode_date(fname:intel/06-97-02;cpuid:000b06f2;pf_mask:0x7)
= 2023.01.04 iucode_date(fname:intel/06-97-02;cpuid:000b06f2;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"C0";pf_model:0x3)
= 2023.01.04 iucode_date(fname:intel/06-97-02;cpuid:000b06f5;pf_mask:0x7)
= 2023.01.04 iucode_date(fname:intel/06-97-02;cpuid:000b06f5;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"C0";pf_model:0x3)
= 2023.01.04 iucode_date(fname:intel/06-97-05;cpuid:00090672;pf_mask:0x7)
= 2023.01.04 iucode_date(fname:intel/06-97-05;cpuid:00090672;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake_S_8+8";stepping:"C0";pf_model:0x2)
= 2023.01.04 iucode_date(fname:intel/06-97-05;cpuid:00090672;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"C0";pf_model:0x2)
= 2023.01.04 iucode_date(fname:intel/06-97-05;cpuid:00090672;pf_mask:0x7;segment:"Mobile";codename:"Alder_Lake_HX";stepping:"C0";pf_model:0x3)
= 2023.01.04 iucode_date(fname:intel/06-97-05;cpuid:00090672;pf_mask:0x7;segment:"Mobile";codename:"Alder_Lake";stepping:"C0";pf_model:0x3)
= 2023.01.04 iucode_date(fname:intel/06-97-05;cpuid:00090675;pf_mask:0x7)
= 2023.01.04 iucode_date(fname:intel/06-97-05;cpuid:00090675;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake_S_6+0";stepping:"K0";pf_model:0x1)
= 2023.01.04 iucode_date(fname:intel/06-97-05;cpuid:00090675;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"K0";pf_model:0x1)
= 2023.01.04 iucode_date(fname:intel/06-97-05;cpuid:000b06f2;pf_mask:0x7)
= 2023.01.04 iucode_date(fname:intel/06-97-05;cpuid:000b06f2;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"C0";pf_model:0x3)
= 2023.01.04 iucode_date(fname:intel/06-97-05;cpuid:000b06f5;pf_mask:0x7)
= 2023.01.04 iucode_date(fname:intel/06-97-05;cpuid:000b06f5;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"C0";pf_model:0x3)
= 2023.01.11 iucode_date(fname:intel/06-9a-03;cpuid:000906a3;pf_mask:0x80)
= 2023.01.11 iucode_date(fname:intel/06-9a-03;cpuid:000906a3;pf_mask:0x80;segment:"Mobile";codename:"Alder_Lake_P_6+8";stepping:"L0";pf_model:0x82)
= 2023.01.11 iucode_date(fname:intel/06-9a-03;cpuid:000906a3;pf_mask:0x80;segment:"Mobile";codename:"Alder_Lake";stepping:"L0";pf_model:0x82)
= 2023.01.11 iucode_date(fname:intel/06-9a-03;cpuid:000906a3;pf_mask:0x80;segment:"Mobile";codename:"Alder_Lake";stepping:"R0";pf_model:0x80)
= 2023.01.11 iucode_date(fname:intel/06-9a-03;cpuid:000906a3;pf_mask:0x80;segment:"Mobile";codename:"Alder_Lake_U_9W";stepping:"R0";pf_model:0x80)
= 2023.01.11 iucode_date(fname:intel/06-9a-03;cpuid:000906a4;pf_mask:0x80)
= 2023.01.11 iucode_date(fname:intel/06-9a-03;cpuid:000906a4;pf_mask:0x80;segment:"Mobile";codename:"Alder_Lake_P_2+8";stepping:"R0";pf_model:0x82)
= 2023.01.11 iucode_date(fname:intel/06-9a-03;cpuid:000906a4;pf_mask:0x80;segment:"Mobile";codename:"Alder_Lake";stepping:"R0";pf_model:0x82)
= 2023.01.11 iucode_date(fname:intel/06-9a-04;cpuid:000906a3;pf_mask:0x80)
= 2023.01.11 iucode_date(fname:intel/06-9a-04;cpuid:000906a3;pf_mask:0x80;segment:"Mobile";codename:"Alder_Lake_P_6+8";stepping:"L0";pf_model:0x82)
= 2023.01.11 iucode_date(fname:intel/06-9a-04;cpuid:000906a3;pf_mask:0x80;segment:"Mobile";codename:"Alder_Lake";stepping:"L0";pf_model:0x82)
= 2023.01.11 iucode_date(fname:intel/06-9a-04;cpuid:000906a3;pf_mask:0x80;segment:"Mobile";codename:"Alder_Lake";stepping:"R0";pf_model:0x80)
= 2023.01.11 iucode_date(fname:intel/06-9a-04;cpuid:000906a3;pf_mask:0x80;segment:"Mobile";codename:"Alder_Lake_U_9W";stepping:"R0";pf_model:0x80)
= 2023.01.11 iucode_date(fname:intel/06-9a-04;cpuid:000906a4;pf_mask:0x80)
= 2023.01.11 iucode_date(fname:intel/06-9a-04;cpuid:000906a4;pf_mask:0x80;segment:"Mobile";codename:"Alder_Lake_P_2+8";stepping:"R0";pf_model:0x82)
= 2023.01.11 iucode_date(fname:intel/06-9a-04;cpuid:000906a4;pf_mask:0x80;segment:"Mobile";codename:"Alder_Lake";stepping:"R0";pf_model:0x82)
= 2022.09.02 iucode_date(fname:intel/06-9c-00;cpuid:000906c0;pf_mask:0x1)
= 2022.09.02 iucode_date(fname:intel/06-9c-00;cpuid:000906c0;pf_mask:0x1;segment:"SOC";codename:"Jasper_Lake";stepping:"A0";pf_model:0x1)
= 2022.09.02 iucode_date(fname:intel/06-9c-00;cpuid:000906c0;pf_mask:0x1;segment:"SOC";codename:"Jasper_Lake";stepping:"A1";pf_model:0x1)
= 2021.11.12 iucode_date(fname:intel/06-9e-09;cpuid:000906e9;pf_mask:0x2a)
= 2021.11.12 iucode_date(fname:intel/06-9e-09;cpuid:000906e9;pf_mask:0x2a;segment:"Desktop";codename:"Kaby_Lake_S";stepping:"B0";pf_model:0x2a)
= 2021.11.12 iucode_date(fname:intel/06-9e-09;cpuid:000906e9;pf_mask:0x2a;segment:"Desktop";codename:"Kaby_Lake";stepping:"B0";pf_model:0x2a)
= 2021.11.12 iucode_date(fname:intel/06-9e-09;cpuid:000906e9;pf_mask:0x2a;segment:"Desktop";codename:"Kaby_Lake_X";stepping:"B0";pf_model:0x2a)
= 2021.11.12 iucode_date(fname:intel/06-9e-09;cpuid:000906e9;pf_mask:0x2a;segment:"Mobile";codename:"Kaby_Lake_G";stepping:"B0";pf_model:0x2a)
= 2021.11.12 iucode_date(fname:intel/06-9e-09;cpuid:000906e9;pf_mask:0x2a;segment:"Mobile";codename:"Kaby_Lake_H";stepping:"B0";pf_model:0x2a)
= 2021.11.12 iucode_date(fname:intel/06-9e-09;cpuid:000906e9;pf_mask:0x2a;segment:"Mobile";codename:"Kaby_Lake";stepping:"B0";pf_model:0x2a)
= 2021.11.12 iucode_date(fname:intel/06-9e-09;cpuid:000906e9;pf_mask:0x2a;segment:"Server";codename:"Kaby_Lake";stepping:"B0";pf_model:0x2a)
= 2021.11.12 iucode_date(fname:intel/06-9e-09;cpuid:000906e9;pf_mask:0x2a;segment:"Server";codename:"Kaby_Lake_Xeon_E3";stepping:"B0";pf_model:0x2a)
= 2021.11.15 iucode_date(fname:intel/06-9e-0a;cpuid:000906ea;pf_mask:0x22)
= 2021.11.15 iucode_date(fname:intel/06-9e-0a;cpuid:000906ea;pf_mask:0x22;segment:"Desktop";codename:"Coffee_Lake_S";stepping:"U0";pf_model:0x22)
= 2021.11.15 iucode_date(fname:intel/06-9e-0a;cpuid:000906ea;pf_mask:0x22;segment:"Desktop";codename:"Coffee_Lake";stepping:"U0";pf_model:0x22)
= 2021.11.15 iucode_date(fname:intel/06-9e-0a;cpuid:000906ea;pf_mask:0x22;segment:"Mobile";codename:"Coffee_Lake_H";stepping:"U0";pf_model:0x22)
= 2021.11.15 iucode_date(fname:intel/06-9e-0a;cpuid:000906ea;pf_mask:0x22;segment:"Mobile";codename:"Coffee_Lake";stepping:"U0";pf_model:0x22)
= 2021.11.15 iucode_date(fname:intel/06-9e-0a;cpuid:000906ea;pf_mask:0x22;segment:"Server";codename:"Coffee_Lake";stepping:"U0";pf_model:0x22)
= 2021.11.15 iucode_date(fname:intel/06-9e-0a;cpuid:000906ea;pf_mask:0x22;segment:"Server";codename:"Coffee_Lake_Xeon_E";stepping:"U0";pf_model:0x22)
= 2021.11.12 iucode_date(fname:intel/06-9e-0b;cpuid:000906eb;pf_mask:0x2)
= 2021.11.12 iucode_date(fname:intel/06-9e-0b;cpuid:000906eb;pf_mask:0x2;segment:"Desktop";codename:"Coffee_Lake_S";stepping:"B0";pf_model:0x2)
= 2021.11.12 iucode_date(fname:intel/06-9e-0b;cpuid:000906eb;pf_mask:0x2;segment:"Desktop";codename:"Coffee_Lake";stepping:"B0";pf_model:0x2)
= 2021.11.12 iucode_date(fname:intel/06-9e-0b;cpuid:000906eb;pf_mask:0x2;segment:"Mobile";codename:"Coffee_Lake_H";stepping:"B0";pf_model:0x2)
= 2021.11.12 iucode_date(fname:intel/06-9e-0b;cpuid:000906eb;pf_mask:0x2;segment:"Mobile";codename:"Coffee_Lake";stepping:"B0";pf_model:0x2)
= 2021.11.12 iucode_date(fname:intel/06-9e-0b;cpuid:000906eb;pf_mask:0x2;segment:"Server";codename:"Coffee_Lake_E";stepping:"B0";pf_model:0x2)
= 2021.11.12 iucode_date(fname:intel/06-9e-0b;cpuid:000906eb;pf_mask:0x2;segment:"Server";codename:"Coffee_Lake";stepping:"B0";pf_model:0x2)
= 2021.11.15 iucode_date(fname:intel/06-9e-0c;cpuid:000906ec;pf_mask:0x22)
= 2021.11.15 iucode_date(fname:intel/06-9e-0c;cpuid:000906ec;pf_mask:0x22;segment:"Desktop";codename:"Coffee_Lake_S";stepping:"P0";pf_model:0x22)
= 2021.11.15 iucode_date(fname:intel/06-9e-0c;cpuid:000906ec;pf_mask:0x22;segment:"Desktop";codename:"Coffee_Lake";stepping:"P0";pf_model:0x22)
= 2021.11.15 iucode_date(fname:intel/06-9e-0c;cpuid:000906ec;pf_mask:0x22;segment:"Mobile";codename:"Coffee_Lake_H";stepping:"P0";pf_model:0x22)
= 2021.11.15 iucode_date(fname:intel/06-9e-0c;cpuid:000906ec;pf_mask:0x22;segment:"Mobile";codename:"Coffee_Lake";stepping:"P0";pf_model:0x22)
= 2021.11.15 iucode_date(fname:intel/06-9e-0c;cpuid:000906ec;pf_mask:0x22;segment:"Server";codename:"Coffee_Lake";stepping:"P0";pf_model:0x22)
= 2021.11.15 iucode_date(fname:intel/06-9e-0c;cpuid:000906ec;pf_mask:0x22;segment:"Server";codename:"Coffee_Lake_Xeon_E";stepping:"P0";pf_model:0x22)
= 2022.07.31 iucode_date(fname:intel/06-9e-0d;cpuid:000906ed;pf_mask:0x22)
= 2022.07.31 iucode_date(fname:intel/06-9e-0d;cpuid:000906ed;pf_mask:0x22;segment:"Desktop";codename:"Coffee_Lake_S";stepping:"R0";pf_model:0x22)
= 2022.07.31 iucode_date(fname:intel/06-9e-0d;cpuid:000906ed;pf_mask:0x22;segment:"Desktop";codename:"Coffee_Lake";stepping:"R0";pf_model:0x22)
= 2022.07.31 iucode_date(fname:intel/06-9e-0d;cpuid:000906ed;pf_mask:0x22;segment:"Mobile";codename:"Coffee_Lake_H";stepping:"R0";pf_model:0x22)
= 2022.07.31 iucode_date(fname:intel/06-9e-0d;cpuid:000906ed;pf_mask:0x22;segment:"Mobile";codename:"Coffee_Lake";stepping:"R0";pf_model:0x22)
= 2022.07.31 iucode_date(fname:intel/06-9e-0d;cpuid:000906ed;pf_mask:0x22;segment:"Server";codename:"Coffee_Lake";stepping:"R0";pf_model:0x22)
= 2022.07.31 iucode_date(fname:intel/06-9e-0d;cpuid:000906ed;pf_mask:0x22;segment:"Server";codename:"Coffee_Lake_Xeon_E";stepping:"R0";pf_model:0x22)
= 2022.07.31 iucode_date(fname:intel/06-a5-02;cpuid:000a0652;pf_mask:0x20)
= 2022.07.31 iucode_date(fname:intel/06-a5-02;cpuid:000a0652;pf_mask:0x20;segment:"Mobile";codename:"Comet_Lake_H";stepping:"R1";pf_model:0x20)
= 2022.07.31 iucode_date(fname:intel/06-a5-02;cpuid:000a0652;pf_mask:0x20;segment:"Mobile";codename:"Comet_Lake";stepping:"R1";pf_model:0x20)
= 2022.07.31 iucode_date(fname:intel/06-a5-03;cpuid:000a0653;pf_mask:0x22)
= 2022.07.31 iucode_date(fname:intel/06-a5-03;cpuid:000a0653;pf_mask:0x22;segment:"Desktop";codename:"Comet_Lake_S_6+2";stepping:"G1";pf_model:0x22)
= 2022.07.31 iucode_date(fname:intel/06-a5-03;cpuid:000a0653;pf_mask:0x22;segment:"Desktop";codename:"Comet_Lake";stepping:"G1";pf_model:0x22)
= 2022.07.31 iucode_date(fname:intel/06-a5-05;cpuid:000a0655;pf_mask:0x22)
= 2022.07.31 iucode_date(fname:intel/06-a5-05;cpuid:000a0655;pf_mask:0x22;segment:"Desktop";codename:"Comet_Lake_S_10+2";stepping:"Q0";pf_model:0x22)
= 2022.07.31 iucode_date(fname:intel/06-a5-05;cpuid:000a0655;pf_mask:0x22;segment:"Desktop";codename:"Comet_Lake";stepping:"Q0";pf_model:0x22)
= 2022.07.31 iucode_date(fname:intel/06-a6-00;cpuid:000a0660;pf_mask:0x80)
= 2022.07.31 iucode_date(fname:intel/06-a6-00;cpuid:000a0660;pf_mask:0x80;segment:"Mobile";codename:"Comet_Lake";stepping:"A0";pf_model:0x80)
= 2022.07.31 iucode_date(fname:intel/06-a6-00;cpuid:000a0660;pf_mask:0x80;segment:"Mobile";codename:"Comet_Lake_U_6+2";stepping:"A0";pf_model:0x80)
= 2022.07.31 iucode_date(fname:intel/06-a6-01;cpuid:000a0661;pf_mask:0x80)
= 2022.07.31 iucode_date(fname:intel/06-a6-01;cpuid:000a0661;pf_mask:0x80;segment:"Mobile";codename:"Comet_Lake";stepping:"K1";pf_model:0x80)
= 2022.07.31 iucode_date(fname:intel/06-a6-01;cpuid:000a0661;pf_mask:0x80;segment:"Mobile";codename:"Comet_Lake_U_6+2_v2";stepping:"K1";pf_model:0x80)
= 2022.08.31 iucode_date(fname:intel/06-a7-01;cpuid:000a0671;pf_mask:0x2)
= 2022.08.31 iucode_date(fname:intel/06-a7-01;cpuid:000a0671;pf_mask:0x2;segment:"Desktop";codename:"Rocket_Lake_S";stepping:"B0";pf_model:0x2)
= 2022.08.31 iucode_date(fname:intel/06-a7-01;cpuid:000a0671;pf_mask:0x2;segment:"Desktop";codename:"Rocket_Lake";stepping:"B0";pf_model:0x2)
= 2022.12.19 iucode_date(fname:intel/06-b7-01;cpuid:000b0671;pf_mask:0x32)
= 2022.12.19 iucode_date(fname:intel/06-b7-01;cpuid:000b0671;pf_mask:0x32;segment:"Desktop";codename:"Raptor_Lake_S";stepping:"S0";pf_model:0x32)
= 2022.12.19 iucode_date(fname:intel/06-b7-01;cpuid:000b0671;pf_mask:0x32;segment:"Desktop";codename:"Raptor_Lake";stepping:"S0";pf_model:0x32)
= 2022.12.08 iucode_date(fname:intel/06-ba-02;cpuid:000b06a2;pf_mask:0xc0)
= 2022.12.08 iucode_date(fname:intel/06-ba-02;cpuid:000b06a3;pf_mask:0xc0)
= 2022.12.08 iucode_date(fname:intel/06-ba-03;cpuid:000b06a2;pf_mask:0xc0)
= 2022.12.08 iucode_date(fname:intel/06-ba-03;cpuid:000b06a3;pf_mask:0xc0)
= 2023.01.04 iucode_date(fname:intel/06-bf-02;cpuid:00090672;pf_mask:0x7)
= 2023.01.04 iucode_date(fname:intel/06-bf-02;cpuid:00090672;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake_S_8+8";stepping:"C0";pf_model:0x2)
= 2023.01.04 iucode_date(fname:intel/06-bf-02;cpuid:00090672;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"C0";pf_model:0x2)
= 2023.01.04 iucode_date(fname:intel/06-bf-02;cpuid:00090672;pf_mask:0x7;segment:"Mobile";codename:"Alder_Lake_HX";stepping:"C0";pf_model:0x3)
= 2023.01.04 iucode_date(fname:intel/06-bf-02;cpuid:00090672;pf_mask:0x7;segment:"Mobile";codename:"Alder_Lake";stepping:"C0";pf_model:0x3)
= 2023.01.04 iucode_date(fname:intel/06-bf-02;cpuid:00090675;pf_mask:0x7)
= 2023.01.04 iucode_date(fname:intel/06-bf-02;cpuid:00090675;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake_S_6+0";stepping:"K0";pf_model:0x1)
= 2023.01.04 iucode_date(fname:intel/06-bf-02;cpuid:00090675;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"K0";pf_model:0x1)
= 2023.01.04 iucode_date(fname:intel/06-bf-02;cpuid:000b06f2;pf_mask:0x7)
= 2023.01.04 iucode_date(fname:intel/06-bf-02;cpuid:000b06f2;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"C0";pf_model:0x3)
= 2023.01.04 iucode_date(fname:intel/06-bf-02;cpuid:000b06f5;pf_mask:0x7)
= 2023.01.04 iucode_date(fname:intel/06-bf-02;cpuid:000b06f5;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"C0";pf_model:0x3)
= 2023.01.04 iucode_date(fname:intel/06-bf-05;cpuid:00090672;pf_mask:0x7)
= 2023.01.04 iucode_date(fname:intel/06-bf-05;cpuid:00090672;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake_S_8+8";stepping:"C0";pf_model:0x2)
= 2023.01.04 iucode_date(fname:intel/06-bf-05;cpuid:00090672;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"C0";pf_model:0x2)
= 2023.01.04 iucode_date(fname:intel/06-bf-05;cpuid:00090672;pf_mask:0x7;segment:"Mobile";codename:"Alder_Lake_HX";stepping:"C0";pf_model:0x3)
= 2023.01.04 iucode_date(fname:intel/06-bf-05;cpuid:00090672;pf_mask:0x7;segment:"Mobile";codename:"Alder_Lake";stepping:"C0";pf_model:0x3)
= 2023.01.04 iucode_date(fname:intel/06-bf-05;cpuid:00090675;pf_mask:0x7)
= 2023.01.04 iucode_date(fname:intel/06-bf-05;cpuid:00090675;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake_S_6+0";stepping:"K0";pf_model:0x1)
= 2023.01.04 iucode_date(fname:intel/06-bf-05;cpuid:00090675;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"K0";pf_model:0x1)
= 2023.01.04 iucode_date(fname:intel/06-bf-05;cpuid:000b06f2;pf_mask:0x7)
= 2023.01.04 iucode_date(fname:intel/06-bf-05;cpuid:000b06f2;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"C0";pf_model:0x3)
= 2023.01.04 iucode_date(fname:intel/06-bf-05;cpuid:000b06f5;pf_mask:0x7)
= 2023.01.04 iucode_date(fname:intel/06-bf-05;cpuid:000b06f5;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"C0";pf_model:0x3)
= 2002.07.16 iucode_date(fname:intel/0f-00-07;cpuid:00000f07;pf_mask:0x1)
= 2002.07.16 iucode_date(fname:intel/0f-00-07;cpuid:00000f07;pf_mask:0x1;segment:"Desktop";codename:"Willamette_[NetBurst]";stepping:"B2";pf_model:0x1)
= 2000.11.15 iucode_date(fname:intel/0f-00-07;cpuid:00000f07;pf_mask:0x2)
= 2000.11.15 iucode_date(fname:intel/0f-00-07;cpuid:00000f07;pf_mask:0x2;segment:"Server";codename:"Foster_DP_[NetBurst]";stepping:"B2";pf_model:0x2)
= 2002.07.16 iucode_date(fname:intel/0f-00-0a;cpuid:00000f0a;pf_mask:0x1)
= 2002.07.16 iucode_date(fname:intel/0f-00-0a;cpuid:00000f0a;pf_mask:0x1;segment:"Desktop";codename:"Willamette_[NetBurst]";stepping:"C1";pf_model:0x1)
= 2002.08.21 iucode_date(fname:intel/0f-00-0a;cpuid:00000f0a;pf_mask:0x2)
= 2002.08.21 iucode_date(fname:intel/0f-00-0a;cpuid:00000f0a;pf_mask:0x2;segment:"Server";codename:"Foster_DP_[NetBurst]";stepping:"C1";pf_model:0x2)
= 2002.07.16 iucode_date(fname:intel/0f-00-0a;cpuid:00000f0a;pf_mask:0x4)
= 2002.07.16 iucode_date(fname:intel/0f-00-0a;cpuid:00000f0a;pf_mask:0x4;segment:"Desktop";codename:"Willamette_[NetBurst]";stepping:"C1";pf_model:0x4)
= 2003.05.02 iucode_date(fname:intel/0f-01-02;cpuid:00000f12;pf_mask:0x4)
= 2003.05.02 iucode_date(fname:intel/0f-01-02;cpuid:00000f12;pf_mask:0x4;segment:"Desktop";codename:"Willamette_[NetBurst]";stepping:"D0";pf_model:0x4)
= 2003.06.10 iucode_date(fname:intel/0f-02-04;cpuid:00000f24;pf_mask:0x10)
= 2003.06.10 iucode_date(fname:intel/0f-02-04;cpuid:00000f24;pf_mask:0x10;segment:"Mobile";codename:"Northwood_[NetBurst]";stepping:"B0";pf_model:0x10)
= 2003.06.05 iucode_date(fname:intel/0f-02-04;cpuid:00000f24;pf_mask:0x2)
= 2003.06.05 iucode_date(fname:intel/0f-02-04;cpuid:00000f24;pf_mask:0x2;segment:"Server";codename:"Prestonia_[NetBurst]";stepping:"B0";pf_model:0x2)
= 2003.06.05 iucode_date(fname:intel/0f-02-04;cpuid:00000f24;pf_mask:0x4)
= 2003.06.05 iucode_date(fname:intel/0f-02-04;cpuid:00000f24;pf_mask:0x4;segment:"Desktop";codename:"Northwood_[NetBurst]";stepping:"B0";pf_model:0x4)
= 2004.08.26 iucode_date(fname:intel/0f-02-05;cpuid:00000f25;pf_mask:0x10)
= 2004.08.26 iucode_date(fname:intel/0f-02-05;cpuid:00000f25;pf_mask:0x10;segment:"Desktop";codename:"Northwood_[NetBurst]";stepping:"B1";pf_model:0x14)
= 2004.08.26 iucode_date(fname:intel/0f-02-05;cpuid:00000f25;pf_mask:0x10;segment:"Desktop";codename:"Northwood_[NetBurst]";stepping:"M0";pf_model:0x14)
= 2004.08.11 iucode_date(fname:intel/0f-02-05;cpuid:00000f25;pf_mask:0x1)
= 2004.08.11 iucode_date(fname:intel/0f-02-05;cpuid:00000f25;pf_mask:0x1;segment:"Server";codename:"Prestonia_[NetBurst]";stepping:"B1";pf_model:0x1)
= 2004.08.11 iucode_date(fname:intel/0f-02-05;cpuid:00000f25;pf_mask:0x1;segment:"Server";codename:"Prestonia_[NetBurst]";stepping:"M0";pf_model:0x1)
= 2004.08.11 iucode_date(fname:intel/0f-02-05;cpuid:00000f25;pf_mask:0x2)
= 2004.08.11 iucode_date(fname:intel/0f-02-05;cpuid:00000f25;pf_mask:0x2;segment:"Server";codename:"Gallatin_[NetBurst]";stepping:"B1";pf_model:0x2)
= 2004.08.11 iucode_date(fname:intel/0f-02-05;cpuid:00000f25;pf_mask:0x4)
= 2004.08.11 iucode_date(fname:intel/0f-02-05;cpuid:00000f25;pf_mask:0x4;segment:"Desktop";codename:"Northwood_[NetBurst]";stepping:"B1";pf_model:0x14)
= 2004.08.11 iucode_date(fname:intel/0f-02-05;cpuid:00000f25;pf_mask:0x4;segment:"Desktop";codename:"Northwood_[NetBurst]";stepping:"M0";pf_model:0x14)
= 2004.08.05 iucode_date(fname:intel/0f-02-06;cpuid:00000f26;pf_mask:0x2)
= 2004.08.05 iucode_date(fname:intel/0f-02-06;cpuid:00000f26;pf_mask:0x2;segment:"Server";codename:"Gallatin_[NetBurst]";stepping:"B1";pf_model:0x2)
= 2003.06.04 iucode_date(fname:intel/0f-02-07;cpuid:00000f27;pf_mask:0x2)
= 2003.06.04 iucode_date(fname:intel/0f-02-07;cpuid:00000f27;pf_mask:0x2;segment:"Server";codename:"Prestonia_[NetBurst]";stepping:"C1";pf_model:0x2)
= 2003.06.04 iucode_date(fname:intel/0f-02-07;cpuid:00000f27;pf_mask:0x4)
= 2003.06.04 iucode_date(fname:intel/0f-02-07;cpuid:00000f27;pf_mask:0x4;segment:"Desktop";codename:"Northwood_[NetBurst]";stepping:"C1";pf_model:0x4)
= 2003.06.04 iucode_date(fname:intel/0f-02-07;cpuid:00000f27;pf_mask:0x8)
= 2003.06.04 iucode_date(fname:intel/0f-02-07;cpuid:00000f27;pf_mask:0x8;segment:"Mobile";codename:"Northwood_[NetBurst]";stepping:"C1";pf_model:0x8)
= 2004.08.11 iucode_date(fname:intel/0f-02-09;cpuid:00000f29;pf_mask:0x2)
= 2004.08.11 iucode_date(fname:intel/0f-02-09;cpuid:00000f29;pf_mask:0x2;segment:"Server";codename:"Prestonia_[NetBurst]";stepping:"D1";pf_model:0x2)
= 2004.08.11 iucode_date(fname:intel/0f-02-09;cpuid:00000f29;pf_mask:0x4)
= 2004.08.11 iucode_date(fname:intel/0f-02-09;cpuid:00000f29;pf_mask:0x4;segment:"Desktop";codename:"Northwood_[NetBurst]";stepping:"D1";pf_model:0x4)
= 2004.08.11 iucode_date(fname:intel/0f-02-09;cpuid:00000f29;pf_mask:0x8)
= 2004.08.11 iucode_date(fname:intel/0f-02-09;cpuid:00000f29;pf_mask:0x8;segment:"Mobile";codename:"Northwood_[NetBurst]";stepping:"D1";pf_model:0x8)
= 2004.05.11 iucode_date(fname:intel/0f-03-02;cpuid:00000f32;pf_mask:0xd)
= 2004.05.11 iucode_date(fname:intel/0f-03-02;cpuid:00000f32;pf_mask:0xd;segment:"Desktop";codename:"Prescott_[NetBurst]";stepping:"B1";pf_model:0xd)
= 2005.04.21 iucode_date(fname:intel/0f-03-03;cpuid:00000f33;pf_mask:0xd)
= 2005.04.21 iucode_date(fname:intel/0f-03-03;cpuid:00000f33;pf_mask:0xd;segment:"Desktop";codename:"Prescott_[NetBurst]";stepping:"C0";pf_model:0xd)
= 2005.04.21 iucode_date(fname:intel/0f-03-04;cpuid:00000f34;pf_mask:0x1d)
= 2005.04.21 iucode_date(fname:intel/0f-03-04;cpuid:00000f34;pf_mask:0x1d;segment:"Desktop";codename:"Prescott_[NetBurst]";stepping:"D0";pf_model:0x1d)
= 2005.04.21 iucode_date(fname:intel/0f-03-04;cpuid:00000f34;pf_mask:0x1d;segment:"Server";codename:"Nocona_[NetBurst]";stepping:"D0";pf_model:0x1d)
= 2005.04.21 iucode_date(fname:intel/0f-04-01;cpuid:00000f41;pf_mask:0x2)
= 2005.04.21 iucode_date(fname:intel/0f-04-01;cpuid:00000f41;pf_mask:0x2;segment:"Server";codename:"Protomac_[NetBurst]";stepping:"C0";pf_model:0x2)
= 2005.04.22 iucode_date(fname:intel/0f-04-01;cpuid:00000f41;pf_mask:0xbd)
= 2005.04.22 iucode_date(fname:intel/0f-04-01;cpuid:00000f41;pf_mask:0xbd;segment:"Desktop";codename:"Prescott_[NetBurst]";stepping:"E0";pf_model:0xbd)
= 2005.04.22 iucode_date(fname:intel/0f-04-01;cpuid:00000f41;pf_mask:0xbd;segment:"Server";codename:"Cranford_[NetBurst]";stepping:"A0";pf_model:0xbd)
= 2005.04.22 iucode_date(fname:intel/0f-04-01;cpuid:00000f41;pf_mask:0xbd;segment:"Server";codename:"Nocona_[NetBurst]";stepping:"E0";pf_model:0xbd)
= 2005.04.21 iucode_date(fname:intel/0f-04-03;cpuid:00000f43;pf_mask:0x9d)
= 2005.04.21 iucode_date(fname:intel/0f-04-03;cpuid:00000f43;pf_mask:0x9d;segment:"Desktop";codename:"Prescott_[NetBurst]";stepping:"N0";pf_model:0x9d)
= 2005.04.21 iucode_date(fname:intel/0f-04-03;cpuid:00000f43;pf_mask:0x9d;segment:"Server";codename:"Irwindale_[NetBurst]";stepping:"N0";pf_model:0x9d)
= 2005.04.21 iucode_date(fname:intel/0f-04-04;cpuid:00000f44;pf_mask:0x9d)
= 2005.04.21 iucode_date(fname:intel/0f-04-04;cpuid:00000f44;pf_mask:0x9d;segment:"Desktop";codename:"Smithfield_[NetBurst]";stepping:"A0";pf_model:0x9d)
= 2005.04.21 iucode_date(fname:intel/0f-04-07;cpuid:00000f47;pf_mask:0x9d)
= 2005.04.21 iucode_date(fname:intel/0f-04-07;cpuid:00000f47;pf_mask:0x9d;segment:"Desktop";codename:"Smithfield_[NetBurst]";stepping:"B0";pf_model:0x9d)
= 2006.05.08 iucode_date(fname:intel/0f-04-08;cpuid:00000f48;pf_mask:0x1)
= 2006.05.08 iucode_date(fname:intel/0f-04-08;cpuid:00000f48;pf_mask:0x1;segment:"Server";codename:"Paxwille_[NetBurst]";stepping:"A0";pf_model:0x1)
= 2008.01.15 iucode_date(fname:intel/0f-04-08;cpuid:00000f48;pf_mask:0x2)
= 2008.01.15 iucode_date(fname:intel/0f-04-08;cpuid:00000f48;pf_mask:0x2;segment:"Server";codename:"Paxwille_[NetBurst]";stepping:"A0";pf_model:0x2)
= 2005.06.30 iucode_date(fname:intel/0f-04-08;cpuid:00000f48;pf_mask:0x5f)
= 2005.06.30 iucode_date(fname:intel/0f-04-08;cpuid:00000f48;pf_mask:0x5f;segment:"Server";codename:"Paxwille_[NetBurst]";stepping:"A0";pf_model:0x1)
= 2005.06.30 iucode_date(fname:intel/0f-04-08;cpuid:00000f48;pf_mask:0x5f;segment:"Server";codename:"Paxwille_[NetBurst]";stepping:"A0";pf_model:0x2)
= 2005.04.21 iucode_date(fname:intel/0f-04-09;cpuid:00000f49;pf_mask:0xbd)
= 2005.04.21 iucode_date(fname:intel/0f-04-09;cpuid:00000f49;pf_mask:0xbd;segment:"Desktop";codename:"Prescott_[NetBurst]";stepping:"G1";pf_model:0xbd)
= 2005.04.21 iucode_date(fname:intel/0f-04-09;cpuid:00000f49;pf_mask:0xbd;segment:"Server";codename:"Cranford_[NetBurst]";stepping:"B0";pf_model:0xbd)
= 2005.04.21 iucode_date(fname:intel/0f-04-09;cpuid:00000f49;pf_mask:0xbd;segment:"Server";codename:"Nocona_[NetBurst]";stepping:"G1";pf_model:0xbd)
= 2005.12.14 iucode_date(fname:intel/0f-04-0a;cpuid:00000f4a;pf_mask:0x5c)
= 2005.12.14 iucode_date(fname:intel/0f-04-0a;cpuid:00000f4a;pf_mask:0x5c;segment:"Desktop";codename:"Prescott_[NetBurst]";stepping:"R0";pf_model:0x5c)
= 2005.12.14 iucode_date(fname:intel/0f-04-0a;cpuid:00000f4a;pf_mask:0x5c;segment:"Server";codename:"Irwindale_[NetBurst]";stepping:"R0";pf_model:0x5d)
= 2005.06.10 iucode_date(fname:intel/0f-04-0a;cpuid:00000f4a;pf_mask:0x5d)
= 2005.06.10 iucode_date(fname:intel/0f-04-0a;cpuid:00000f4a;pf_mask:0x5d;segment:"Desktop";codename:"Prescott_[NetBurst]";stepping:"R0";pf_model:0x5c)
= 2005.06.10 iucode_date(fname:intel/0f-04-0a;cpuid:00000f4a;pf_mask:0x5d;segment:"Server";codename:"Irwindale_[NetBurst]";stepping:"R0";pf_model:0x5d)
= 2005.12.15 iucode_date(fname:intel/0f-06-02;cpuid:00000f62;pf_mask:0x4)
= 2005.12.15 iucode_date(fname:intel/0f-06-02;cpuid:00000f62;pf_mask:0x4;segment:"Desktop";codename:"Cedar_Mill_[NetBurst]";stepping:"B1";pf_model:0x4)
= 2005.12.15 iucode_date(fname:intel/0f-06-02;cpuid:00000f62;pf_mask:0x4;segment:"Desktop";codename:"Presler_[NetBurst]";stepping:"B1";pf_model:0x4)
= 2005.12.15 iucode_date(fname:intel/0f-06-04;cpuid:00000f64;pf_mask:0x1)
= 2005.12.15 iucode_date(fname:intel/0f-06-04;cpuid:00000f64;pf_mask:0x1;segment:"Server";codename:"Dempsey_[NetBurst]";stepping:"C1";pf_model:0x1)
= 2005.12.23 iucode_date(fname:intel/0f-06-04;cpuid:00000f64;pf_mask:0x34)
= 2005.12.23 iucode_date(fname:intel/0f-06-04;cpuid:00000f64;pf_mask:0x34;segment:"Desktop";codename:"Cedar_Mill_[NetBurst]";stepping:"C1";pf_model:0x34)
= 2005.12.23 iucode_date(fname:intel/0f-06-04;cpuid:00000f64;pf_mask:0x34;segment:"Desktop";codename:"Presler_[NetBurst]";stepping:"C1";pf_model:0x34)
= 2006.04.26 iucode_date(fname:intel/0f-06-05;cpuid:00000f65;pf_mask:0x1)
= 2006.04.26 iucode_date(fname:intel/0f-06-05;cpuid:00000f65;pf_mask:0x1;segment:"Server";codename:"Dempsey_[NetBurst]";stepping:"D0";pf_model:0x1)
= 2006.07.14 iucode_date(fname:intel/0f-06-08;cpuid:00000f68;pf_mask:0x22)
= 2006.07.14 iucode_date(fname:intel/0f-06-08;cpuid:00000f68;pf_mask:0x22;segment:"Server";codename:"Tulsa_[NetBurst]";stepping:"B0";pf_model:0x22)
= 0x2 iucode_rev(fname:intel/06-03-02;cpuid:00001632;pf_mask:0x0)
= 0x40 iucode_rev(fname:intel/06-05-00;cpuid:00000650;pf_mask:0x1)
= 0x40 iucode_rev(fname:intel/06-05-00;cpuid:00000650;pf_mask:0x1;segment:"Desktop";codename:"Deschutes_SEPP_[PII]";stepping:"A0";pf_model:0x1)
= 0x41 iucode_rev(fname:intel/06-05-00;cpuid:00000650;pf_mask:0x2)
= 0x41 iucode_rev(fname:intel/06-05-00;cpuid:00000650;pf_mask:0x2;segment:"Mobile";codename:"Deschutes_Mini-Cart_[PII]";stepping:"A0";pf_model:0x2)
= 0x45 iucode_rev(fname:intel/06-05-00;cpuid:00000650;pf_mask:0x8)
= 0x45 iucode_rev(fname:intel/06-05-00;cpuid:00000650;pf_mask:0x8;segment:"Mobile";codename:"Deschutes_MMC1/MMC2_[PII]";stepping:"A0";pf_model:0x8)
= 0x40 iucode_rev(fname:intel/06-05-00;platform_id:0x1)
= 0x41 iucode_rev(fname:intel/06-05-00;platform_id:0x2)
= 0x45 iucode_rev(fname:intel/06-05-00;platform_id:0x8)
= 0x40 iucode_rev(fname:intel/06-05-01;cpuid:00000651;pf_mask:0x1)
= 0x40 iucode_rev(fname:intel/06-05-01;cpuid:00000651;pf_mask:0x1;segment:"Desktop";codename:"Deschutes_SECC/SECC2_[PII]";stepping:"A1";pf_model:0x1)
= 0x40 iucode_rev(fname:intel/06-05-01;cpuid:00000651;pf_mask:0x1;segment:"Desktop";codename:"Deschutes_SEPP_[PII]";stepping:"A1";pf_model:0x1)
= 0x40 iucode_rev(fname:intel/06-05-01;platform_id:0x1)
= 0x2a iucode_rev(fname:intel/06-05-02;cpuid:00000652;pf_mask:0x1)
= 0x2a iucode_rev(fname:intel/06-05-02;cpuid:00000652;pf_mask:0x1;segment:"Desktop";codename:"Deschutes_SECC/SECC2_[PII]";stepping:"B0";pf_model:0x1)
= 0x2c iucode_rev(fname:intel/06-05-02;cpuid:00000652;pf_mask:0x2)
= 0x2c iucode_rev(fname:intel/06-05-02;cpuid:00000652;pf_mask:0x2;segment:"Mobile";codename:"Deschutes_Mini-Cart_[PII]";stepping:"B0";pf_model:0x2)
= 0x2b iucode_rev(fname:intel/06-05-02;cpuid:00000652;pf_mask:0x4)
= 0x2b iucode_rev(fname:intel/06-05-02;cpuid:00000652;pf_mask:0x4;segment:"Server";codename:"Deschutes_SECC_[PII]";stepping:"B0";pf_model:0x4)
= 0x2a iucode_rev(fname:intel/06-05-02;platform_id:0x1)
= 0x2c iucode_rev(fname:intel/06-05-02;platform_id:0x2)
= 0x2b iucode_rev(fname:intel/06-05-02;platform_id:0x4)
= 0x10 iucode_rev(fname:intel/06-05-03;cpuid:00000653;pf_mask:0x1)
= 0x10 iucode_rev(fname:intel/06-05-03;cpuid:00000653;pf_mask:0x1;segment:"Desktop";codename:"Deschutes_SECC/SECC2_[PII]";stepping:"B1";pf_model:0x1)
= 0xc iucode_rev(fname:intel/06-05-03;cpuid:00000653;pf_mask:0x2)
= 0xc iucode_rev(fname:intel/06-05-03;cpuid:00000653;pf_mask:0x2;segment:"Mobile";codename:"Deschutes_Mini-Cart_[PII]";stepping:"B1";pf_model:0x2)
= 0xb iucode_rev(fname:intel/06-05-03;cpuid:00000653;pf_mask:0x4)
= 0xb iucode_rev(fname:intel/06-05-03;cpuid:00000653;pf_mask:0x4;segment:"Server";codename:"Deschutes_SECC_[PII]";stepping:"B1";pf_model:0x4)
= 0xd iucode_rev(fname:intel/06-05-03;cpuid:00000653;pf_mask:0x8)
= 0xd iucode_rev(fname:intel/06-05-03;cpuid:00000653;pf_mask:0x8;segment:"Mobile";codename:"Deschutes_MMC1/MMC2_[PII]";stepping:"B1";pf_model:0x8)
= 0x10 iucode_rev(fname:intel/06-05-03;platform_id:0x1)
= 0xc iucode_rev(fname:intel/06-05-03;platform_id:0x2)
= 0xb iucode_rev(fname:intel/06-05-03;platform_id:0x4)
= 0xd iucode_rev(fname:intel/06-05-03;platform_id:0x8)
= 0xa iucode_rev(fname:intel/06-06-00;cpuid:00000660;pf_mask:0x1)
= 0xa iucode_rev(fname:intel/06-06-00;cpuid:00000660;pf_mask:0x1;segment:"Desktop";codename:"Mendocino_SEPP_[PII]";stepping:"A0";pf_model:0x1)
= 0xa iucode_rev(fname:intel/06-06-00;platform_id:0x1)
= 0x3 iucode_rev(fname:intel/06-06-05;cpuid:00000665;pf_mask:0x10)
= 0x3 iucode_rev(fname:intel/06-06-05;cpuid:00000665;pf_mask:0x10;segment:"Desktop";codename:"Mendocino_PPGA_[PII]";stepping:"B0";pf_model:0x10)
= 0x3 iucode_rev(fname:intel/06-06-05;platform_id:0x10)
= 0xb iucode_rev(fname:intel/06-06-0a;cpuid:0000066a;pf_mask:0x20)
= 0xb iucode_rev(fname:intel/06-06-0a;cpuid:0000066a;pf_mask:0x20;segment:"Mobile";codename:"Dixon_Micro-PGA1_[PII]";stepping:"A1";pf_model:0x20)
= 0xc iucode_rev(fname:intel/06-06-0a;cpuid:0000066a;pf_mask:0x2)
= 0xc iucode_rev(fname:intel/06-06-0a;cpuid:0000066a;pf_mask:0x2;segment:"Mobile";codename:"Dixon_Mini-Cart_[PII]";stepping:"A1";pf_model:0x2)
= 0xd iucode_rev(fname:intel/06-06-0a;cpuid:0000066a;pf_mask:0x8)
= 0xd iucode_rev(fname:intel/06-06-0a;cpuid:0000066a;pf_mask:0x8;segment:"Mobile";codename:"Dixon_MMC1/MMC2_[PII]";stepping:"A1";pf_model:0x8)
= 0xb iucode_rev(fname:intel/06-06-0a;platform_id:0x20)
= 0xc iucode_rev(fname:intel/06-06-0a;platform_id:0x2)
= 0xd iucode_rev(fname:intel/06-06-0a;platform_id:0x8)
= 0x7 iucode_rev(fname:intel/06-06-0d;cpuid:0000066d;pf_mask:0x20)
= 0x7 iucode_rev(fname:intel/06-06-0d;cpuid:0000066d;pf_mask:0x20;segment:"Mobile";codename:"Dixon_Micro-PGA1_[PII]";stepping:"A1";pf_model:0x20)
= 0x5 iucode_rev(fname:intel/06-06-0d;cpuid:0000066d;pf_mask:0x2)
= 0x5 iucode_rev(fname:intel/06-06-0d;cpuid:0000066d;pf_mask:0x2;segment:"Mobile";codename:"Dixon_Mini-Cart_[PII]";stepping:"A1";pf_model:0x2)
= 0x6 iucode_rev(fname:intel/06-06-0d;cpuid:0000066d;pf_mask:0x8)
= 0x6 iucode_rev(fname:intel/06-06-0d;cpuid:0000066d;pf_mask:0x8;segment:"Mobile";codename:"Dixon_MMC1/MMC2_[PII]";stepping:"A1";pf_model:0x8)
= 0x7 iucode_rev(fname:intel/06-06-0d;platform_id:0x20)
= 0x5 iucode_rev(fname:intel/06-06-0d;platform_id:0x2)
= 0x6 iucode_rev(fname:intel/06-06-0d;platform_id:0x8)
= 0x14 iucode_rev(fname:intel/06-07-01;cpuid:00000671;pf_mask:0x4)
= 0x14 iucode_rev(fname:intel/06-07-01;cpuid:00000671;pf_mask:0x4;segment:"Server";codename:"Tanner_SECC_[PIII]";stepping:"B0";pf_model:0x4)
= 0x14 iucode_rev(fname:intel/06-07-01;platform_id:0x4)
= 0x38 iucode_rev(fname:intel/06-07-02;cpuid:00000672;pf_mask:0x4)
= 0x38 iucode_rev(fname:intel/06-07-02;cpuid:00000672;pf_mask:0x4;segment:"Server";codename:"Tanner_SECC_[PIII]";stepping:"B0";pf_model:0x4)
= 0x38 iucode_rev(fname:intel/06-07-02;platform_id:0x4)
= 0x2e iucode_rev(fname:intel/06-07-03;cpuid:00000673;pf_mask:0x4)
= 0x2e iucode_rev(fname:intel/06-07-03;cpuid:00000673;pf_mask:0x4;segment:"Server";codename:"Tanner_SECC_[PIII]";stepping:"C0";pf_model:0x4)
= 0x2e iucode_rev(fname:intel/06-07-03;platform_id:0x4)
= 0x11 iucode_rev(fname:intel/06-08-01;cpuid:00000681;pf_mask:0x10)
= 0x11 iucode_rev(fname:intel/06-08-01;cpuid:00000681;pf_mask:0x10;segment:"Desktop";codename:"Coppermine_FC-PGA_[PIII]";stepping:"A2";pf_model:0x10)
= 0xd iucode_rev(fname:intel/06-08-01;cpuid:00000681;pf_mask:0x1)
= 0xd iucode_rev(fname:intel/06-08-01;cpuid:00000681;pf_mask:0x1;segment:"Desktop";codename:"Coppermine_SECC/SECC2_[PIII]";stepping:"A2";pf_model:0x1)
= 0xe iucode_rev(fname:intel/06-08-01;cpuid:00000681;pf_mask:0x20)
= 0xe iucode_rev(fname:intel/06-08-01;cpuid:00000681;pf_mask:0x20;segment:"Mobile";codename:"Coppermine_Micro-PGA2_[PIII]";stepping:"A2";pf_model:0x20)
= 0x10 iucode_rev(fname:intel/06-08-01;cpuid:00000681;pf_mask:0x4)
= 0x10 iucode_rev(fname:intel/06-08-01;cpuid:00000681;pf_mask:0x4;segment:"Server";codename:"Cascades_SECC_[PIII]";stepping:"A2";pf_model:0x4)
= 0xf iucode_rev(fname:intel/06-08-01;cpuid:00000681;pf_mask:0x8)
= 0xf iucode_rev(fname:intel/06-08-01;cpuid:00000681;pf_mask:0x8;segment:"Mobile";codename:"Coppermine_MMC2_[PIII]";stepping:"A2";pf_model:0x8)
= 0x11 iucode_rev(fname:intel/06-08-01;platform_id:0x10)
= 0xd iucode_rev(fname:intel/06-08-01;platform_id:0x1)
= 0xe iucode_rev(fname:intel/06-08-01;platform_id:0x20)
= 0x10 iucode_rev(fname:intel/06-08-01;platform_id:0x4)
= 0xf iucode_rev(fname:intel/06-08-01;platform_id:0x8)
= 0x7 iucode_rev(fname:intel/06-08-03;cpuid:00000683;pf_mask:0x20)
= 0x7 iucode_rev(fname:intel/06-08-03;cpuid:00000683;pf_mask:0x20;segment:"Mobile";codename:"Coppermine_Micro-PGA2_[PIII]";stepping:"B0";pf_model:0x20)
= 0x8 iucode_rev(fname:intel/06-08-03;cpuid:00000683;pf_mask:0x8)
= 0x8 iucode_rev(fname:intel/06-08-03;cpuid:00000683;pf_mask:0x8;segment:"Mobile";codename:"Coppermine_MMC2_[PIII]";stepping:"B0";pf_model:0x8)
= 0x7 iucode_rev(fname:intel/06-08-03;platform_id:0x20)
= 0x8 iucode_rev(fname:intel/06-08-03;platform_id:0x8)
= 0x8 iucode_rev(fname:intel/06-08-06;cpuid:00000686;pf_mask:0x10)
= 0x8 iucode_rev(fname:intel/06-08-06;cpuid:00000686;pf_mask:0x10;segment:"Desktop";codename:"Coppermine_FC-PGA_[PIII]";stepping:"C0";pf_model:0x10)
= 0x7 iucode_rev(fname:intel/06-08-06;cpuid:00000686;pf_mask:0x1)
= 0x7 iucode_rev(fname:intel/06-08-06;cpuid:00000686;pf_mask:0x1;segment:"Desktop";codename:"Coppermine_SECC/SECC2_[PIII]";stepping:"C0";pf_model:0x1)
= 0xa iucode_rev(fname:intel/06-08-06;cpuid:00000686;pf_mask:0x2)
= 0xa iucode_rev(fname:intel/06-08-06;cpuid:00000686;pf_mask:0x2;segment:"Mobile";codename:"Coppermine_[PIII]";stepping:"C0";pf_model:0x2)
= 0x2 iucode_rev(fname:intel/06-08-06;cpuid:00000686;pf_mask:0x4)
= 0x2 iucode_rev(fname:intel/06-08-06;cpuid:00000686;pf_mask:0x4;segment:"Server";codename:"Cascades_SECC_[PIII]";stepping:"C0";pf_model:0x4)
= 0xc iucode_rev(fname:intel/06-08-06;cpuid:00000686;pf_mask:0x80)
= 0xc iucode_rev(fname:intel/06-08-06;cpuid:00000686;pf_mask:0x80;segment:"Desktop";codename:"Coppermine_[PIII]";stepping:"C0";pf_model:0x80)
= 0x8 iucode_rev(fname:intel/06-08-06;platform_id:0x10)
= 0x7 iucode_rev(fname:intel/06-08-06;platform_id:0x1)
= 0xa iucode_rev(fname:intel/06-08-06;platform_id:0x2)
= 0x2 iucode_rev(fname:intel/06-08-06;platform_id:0x4)
= 0xc iucode_rev(fname:intel/06-08-06;platform_id:0x80)
= 0x1 iucode_rev(fname:intel/06-08-0a;cpuid:0000068a;pf_mask:0x10)
= 0x1 iucode_rev(fname:intel/06-08-0a;cpuid:0000068a;pf_mask:0x10;segment:"Desktop";codename:"Coppermine_[PIII]";stepping:"D0";pf_model:0xff)
= 0x4 iucode_rev(fname:intel/06-08-0a;cpuid:0000068a;pf_mask:0x20)
= 0x4 iucode_rev(fname:intel/06-08-0a;cpuid:0000068a;pf_mask:0x20;segment:"Desktop";codename:"Coppermine_[PIII]";stepping:"D0";pf_model:0xff)
= 0x5 iucode_rev(fname:intel/06-08-0a;cpuid:0000068a;pf_mask:0x80)
= 0x5 iucode_rev(fname:intel/06-08-0a;cpuid:0000068a;pf_mask:0x80;segment:"Desktop";codename:"Coppermine_[PIII]";stepping:"D0";pf_model:0xff)
= 0x1 iucode_rev(fname:intel/06-08-0a;platform_id:0x10)
= 0x4 iucode_rev(fname:intel/06-08-0a;platform_id:0x20)
= 0x5 iucode_rev(fname:intel/06-08-0a;platform_id:0x80)
= 0x7 iucode_rev(fname:intel/06-09-05;cpuid:00000695;pf_mask:0x10)
= 0x7 iucode_rev(fname:intel/06-09-05;cpuid:00000695;pf_mask:0x10;segment:"Mobile";codename:"Banias_[P-M]";stepping:"B1";pf_model:0xb0)
= 0x7 iucode_rev(fname:intel/06-09-05;cpuid:00000695;pf_mask:0x20)
= 0x7 iucode_rev(fname:intel/06-09-05;cpuid:00000695;pf_mask:0x20;segment:"Mobile";codename:"Banias_[P-M]";stepping:"B1";pf_model:0xb0)
= 0x47 iucode_rev(fname:intel/06-09-05;cpuid:00000695;pf_mask:0x80)
= 0x47 iucode_rev(fname:intel/06-09-05;cpuid:00000695;pf_mask:0x80;segment:"Mobile";codename:"Banias_[P-M]";stepping:"B1";pf_model:0xb0)
= 0x7 iucode_rev(fname:intel/06-09-05;platform_id:0x10)
= 0x7 iucode_rev(fname:intel/06-09-05;platform_id:0x20)
= 0x47 iucode_rev(fname:intel/06-09-05;platform_id:0x80)
= 0x3 iucode_rev(fname:intel/06-0a-00;cpuid:000006a0;pf_mask:0x4)
= 0x3 iucode_rev(fname:intel/06-0a-00;cpuid:000006a0;pf_mask:0x4;segment:"Server";codename:"Cascades_[PIII]";stepping:"A0";pf_model:0x4)
= 0x3 iucode_rev(fname:intel/06-0a-00;platform_id:0x4)
= 0x1 iucode_rev(fname:intel/06-0a-01;cpuid:000006a1;pf_mask:0x4)
= 0x1 iucode_rev(fname:intel/06-0a-01;cpuid:000006a1;pf_mask:0x4;segment:"Server";codename:"Cascades_[PIII]";stepping:"A1";pf_model:0x4)
= 0x1 iucode_rev(fname:intel/06-0a-01;platform_id:0x4)
= 0x1c iucode_rev(fname:intel/06-0b-01;cpuid:000006b1;pf_mask:0x10)
= 0x1c iucode_rev(fname:intel/06-0b-01;cpuid:000006b1;pf_mask:0x10;segment:"Desktop";codename:"Tualatin_FC-PGA2_[PIII]";stepping:"A1";pf_model:0x10)
= 0x1d iucode_rev(fname:intel/06-0b-01;cpuid:000006b1;pf_mask:0x20)
= 0x1d iucode_rev(fname:intel/06-0b-01;cpuid:000006b1;pf_mask:0x20;segment:"Mobile";codename:"Tualatin_Micro-PGA2_[PIII]";stepping:"A1";pf_model:0x20)
= 0x1c iucode_rev(fname:intel/06-0b-01;platform_id:0x10)
= 0x1d iucode_rev(fname:intel/06-0b-01;platform_id:0x20)
= 0x1 iucode_rev(fname:intel/06-0b-04;cpuid:000006b4;pf_mask:0x10)
= 0x1 iucode_rev(fname:intel/06-0b-04;cpuid:000006b4;pf_mask:0x10;segment:"Desktop";codename:"Tualatin_FC-PGA2_[PIII]";stepping:"B1";pf_model:0x10)
= 0x2 iucode_rev(fname:intel/06-0b-04;cpuid:000006b4;pf_mask:0x20)
= 0x2 iucode_rev(fname:intel/06-0b-04;cpuid:000006b4;pf_mask:0x20;segment:"Mobile";codename:"Tualatin_Micro-PGA2_[PIII]";stepping:"B1";pf_model:0x20)
= 0x1 iucode_rev(fname:intel/06-0b-04;platform_id:0x10)
= 0x2 iucode_rev(fname:intel/06-0b-04;platform_id:0x20)
= 0x18 iucode_rev(fname:intel/06-0d-06;cpuid:000006d6;pf_mask:0x20)
= 0x18 iucode_rev(fname:intel/06-0d-06;cpuid:000006d6;pf_mask:0x20;segment:"Mobile";codename:"Dothan_[P-M]";stepping:"B0";pf_model:0x20)
= 0x18 iucode_rev(fname:intel/06-0d-06;platform_id:0x20)
= 0x39 iucode_rev(fname:intel/06-0e-08;cpuid:000006e8;pf_mask:0x20)
= 0x39 iucode_rev(fname:intel/06-0e-08;cpuid:000006e8;pf_mask:0x20;segment:"Mobile";codename:"Yonah";stepping:"C0";pf_model:0x20)
= 0x39 iucode_rev(fname:intel/06-0e-08;platform_id:0x20)
= 0x54 iucode_rev(fname:intel/06-0e-0c;cpuid:000006ec;pf_mask:0x20)
= 0x54 iucode_rev(fname:intel/06-0e-0c;cpuid:000006ec;pf_mask:0x20;segment:"Mobile";codename:"Yonah";stepping:"E0";pf_model:0xa0)
= 0x59 iucode_rev(fname:intel/06-0e-0c;cpuid:000006ec;pf_mask:0x80)
= 0x59 iucode_rev(fname:intel/06-0e-0c;cpuid:000006ec;pf_mask:0x80;segment:"Mobile";codename:"Yonah";stepping:"E0";pf_model:0xa0)
= 0x54 iucode_rev(fname:intel/06-0e-0c;platform_id:0x20)
= 0x59 iucode_rev(fname:intel/06-0e-0c;platform_id:0x80)
= 0x5d iucode_rev(fname:intel/06-0f-02;cpuid:000006f2;pf_mask:0x1)
= 0x5d iucode_rev(fname:intel/06-0f-02;cpuid:000006f2;pf_mask:0x1;segment:"Desktop";codename:"Conroe_[Merom]";stepping:"L2";pf_model:0x1)
= 0x5d iucode_rev(fname:intel/06-0f-02;cpuid:000006f2;pf_mask:0x1;segment:"Server";codename:"Conroe_Xeon_[Merom]";stepping:"L2";pf_model:0x1)
= 0x5c iucode_rev(fname:intel/06-0f-02;cpuid:000006f2;pf_mask:0x20)
= 0x5c iucode_rev(fname:intel/06-0f-02;cpuid:000006f2;pf_mask:0x20;segment:"Mobile";codename:"Merom";stepping:"L2";pf_model:0x20)
= 0x5d iucode_rev(fname:intel/06-0f-02;platform_id:0x1)
= 0x5c iucode_rev(fname:intel/06-0f-02;platform_id:0x20)
= 0xd0 iucode_rev(fname:intel/06-0f-06;cpuid:000006f6;pf_mask:0x1)
= 0xd0 iucode_rev(fname:intel/06-0f-06;cpuid:000006f6;pf_mask:0x1;segment:"Desktop";codename:"Conroe_[Merom]";stepping:"B2";pf_model:0x1)
= 0xd0 iucode_rev(fname:intel/06-0f-06;cpuid:000006f6;pf_mask:0x1;segment:"Server";codename:"Conroe_Xeon_[Merom]";stepping:"B2";pf_model:0x1)
= 0xd1 iucode_rev(fname:intel/06-0f-06;cpuid:000006f6;pf_mask:0x20)
= 0xd1 iucode_rev(fname:intel/06-0f-06;cpuid:000006f6;pf_mask:0x20;segment:"Mobile";codename:"Merom";stepping:"B2";pf_model:0x20)
= 0xd2 iucode_rev(fname:intel/06-0f-06;cpuid:000006f6;pf_mask:0x4)
= 0xd2 iucode_rev(fname:intel/06-0f-06;cpuid:000006f6;pf_mask:0x4;segment:"Server";codename:"Woodcrest_[Merom]";stepping:"B2";pf_model:0x4)
= 0xd0 iucode_rev(fname:intel/06-0f-06;platform_id:0x1)
= 0xd1 iucode_rev(fname:intel/06-0f-06;platform_id:0x20)
= 0xd2 iucode_rev(fname:intel/06-0f-06;platform_id:0x4)
= 0x6a iucode_rev(fname:intel/06-0f-07;cpuid:000006f7;pf_mask:0x10)
= 0x6a iucode_rev(fname:intel/06-0f-07;cpuid:000006f7;pf_mask:0x10;segment:"Desktop";codename:"Kentsfield_[Merom]";stepping:"B3";pf_model:0x10)
= 0x6a iucode_rev(fname:intel/06-0f-07;cpuid:000006f7;pf_mask:0x10;segment:"Server";codename:"Kentsfield_Xeon_[Merom]";stepping:"B3";pf_model:0x10)
= 0x6b iucode_rev(fname:intel/06-0f-07;cpuid:000006f7;pf_mask:0x40)
= 0x6b iucode_rev(fname:intel/06-0f-07;cpuid:000006f7;pf_mask:0x40;segment:"Server";codename:"Clovertown_[Merom]";stepping:"B3";pf_model:0x40)
= 0x6a iucode_rev(fname:intel/06-0f-07;platform_id:0x10)
= 0x6b iucode_rev(fname:intel/06-0f-07;platform_id:0x40)
= 0x95 iucode_rev(fname:intel/06-0f-0a;cpuid:000006fa;pf_mask:0x80)
= 0x95 iucode_rev(fname:intel/06-0f-0a;cpuid:000006fa;pf_mask:0x80;segment:"Mobile";codename:"Merom";stepping:"E1";pf_model:0x80)
= 0x95 iucode_rev(fname:intel/06-0f-0a;platform_id:0x80)
= 0xba iucode_rev(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x10)
= 0xba iucode_rev(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x10;segment:"Desktop";codename:"Kentsfield_[Merom]";stepping:"G0";pf_model:0x10)
= 0xba iucode_rev(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x10;segment:"Server";codename:"Kentsfield_Xeon_[Merom]";stepping:"G0";pf_model:0x10)
= 0xba iucode_rev(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x1)
= 0xba iucode_rev(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x1;segment:"Desktop";codename:"Conroe_[Merom]";stepping:"G0";pf_model:0x1)
= 0xba iucode_rev(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x1;segment:"Server";codename:"Conroe_Xeon_[Merom]";stepping:"G0";pf_model:0x1)
= 0xba iucode_rev(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x20)
= 0xba iucode_rev(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x20;segment:"Mobile";codename:"Merom";stepping:"G0";pf_model:0xa0)
= 0xbc iucode_rev(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x40)
= 0xbc iucode_rev(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x40;segment:"Server";codename:"Clovertown_[Merom]";stepping:"G0";pf_model:0x40)
= 0xbc iucode_rev(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x4)
= 0xbc iucode_rev(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x4;segment:"Server";codename:"Woodcrest_[Merom]";stepping:"G0";pf_model:0x4)
= 0xba iucode_rev(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x80)
= 0xba iucode_rev(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x80;segment:"Mobile";codename:"Merom";stepping:"G0";pf_model:0xa0)
= 0xbb iucode_rev(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x8)
= 0xbb iucode_rev(fname:intel/06-0f-0b;cpuid:000006fb;pf_mask:0x8;segment:"Server";codename:"Tigerton_[Merom]";stepping:"G0";pf_model:0x8)
= 0xba iucode_rev(fname:intel/06-0f-0b;platform_id:0x10)
= 0xba iucode_rev(fname:intel/06-0f-0b;platform_id:0x1)
= 0xba iucode_rev(fname:intel/06-0f-0b;platform_id:0x20)
= 0xbc iucode_rev(fname:intel/06-0f-0b;platform_id:0x40)
= 0xbc iucode_rev(fname:intel/06-0f-0b;platform_id:0x4)
= 0xba iucode_rev(fname:intel/06-0f-0b;platform_id:0x80)
= 0xbb iucode_rev(fname:intel/06-0f-0b;platform_id:0x8)
= 0xa4 iucode_rev(fname:intel/06-0f-0d;cpuid:000006fd;pf_mask:0x1)
= 0xa4 iucode_rev(fname:intel/06-0f-0d;cpuid:000006fd;pf_mask:0x1;segment:"Desktop";codename:"Conroe_[Merom]";stepping:"M0";pf_model:0x1)
= 0xa4 iucode_rev(fname:intel/06-0f-0d;cpuid:000006fd;pf_mask:0x20)
= 0xa4 iucode_rev(fname:intel/06-0f-0d;cpuid:000006fd;pf_mask:0x20;segment:"Mobile";codename:"Merom";stepping:"M0";pf_model:0xa0)
= 0xa4 iucode_rev(fname:intel/06-0f-0d;cpuid:000006fd;pf_mask:0x80)
= 0xa4 iucode_rev(fname:intel/06-0f-0d;cpuid:000006fd;pf_mask:0x80;segment:"Mobile";codename:"Merom";stepping:"M0";pf_model:0xa0)
= 0xa4 iucode_rev(fname:intel/06-0f-0d;platform_id:0x1)
= 0xa4 iucode_rev(fname:intel/06-0f-0d;platform_id:0x20)
= 0xa4 iucode_rev(fname:intel/06-0f-0d;platform_id:0x80)
= 0x43 iucode_rev(fname:intel/06-16-01;cpuid:00010661;pf_mask:0x1)
= 0x43 iucode_rev(fname:intel/06-16-01;cpuid:00010661;pf_mask:0x1;segment:"Desktop";codename:"Conroe-L_[Merom]";stepping:"A1";pf_model:0x1)
= 0x42 iucode_rev(fname:intel/06-16-01;cpuid:00010661;pf_mask:0x2)
= 0x42 iucode_rev(fname:intel/06-16-01;cpuid:00010661;pf_mask:0x2;segment:"Mobile";codename:"Merom-L";stepping:"A1";pf_model:0x82)
= 0x44 iucode_rev(fname:intel/06-16-01;cpuid:00010661;pf_mask:0x80)
= 0x44 iucode_rev(fname:intel/06-16-01;cpuid:00010661;pf_mask:0x80;segment:"Mobile";codename:"Merom-L";stepping:"A1";pf_model:0x82)
= 0x43 iucode_rev(fname:intel/06-16-01;platform_id:0x1)
= 0x42 iucode_rev(fname:intel/06-16-01;platform_id:0x2)
= 0x44 iucode_rev(fname:intel/06-16-01;platform_id:0x80)
= 0x60f iucode_rev(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x10)
= 0x60f iucode_rev(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x10;segment:"Desktop";codename:"Wolfdale_[Penryn]";stepping:"M0";pf_model:0x91)
= 0x60f iucode_rev(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x10;segment:"Desktop";codename:"Yorkfield_[Penryn]";stepping:"C0";pf_model:0x91)
= 0x60f iucode_rev(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x10;segment:"Mobile";codename:"Penryn";stepping:"C0";pf_model:0x91)
= 0x60f iucode_rev(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x10;segment:"Server";codename:"Wolfdale_Xeon_[Penryn]";stepping:"C0";pf_model:0x91)
= 0x60f iucode_rev(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x10;segment:"Server";codename:"Yorkfield_Xeon_[Penryn]";stepping:"C0";pf_model:0x91)
= 0x60f iucode_rev(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x1)
= 0x60f iucode_rev(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x1;segment:"Desktop";codename:"Wolfdale_[Penryn]";stepping:"M0";pf_model:0x91)
= 0x60f iucode_rev(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x1;segment:"Desktop";codename:"Yorkfield_[Penryn]";stepping:"C0";pf_model:0x91)
= 0x60f iucode_rev(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x1;segment:"Mobile";codename:"Penryn";stepping:"C0";pf_model:0x91)
= 0x60f iucode_rev(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x1;segment:"Server";codename:"Wolfdale_Xeon_[Penryn]";stepping:"C0";pf_model:0x91)
= 0x60f iucode_rev(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x1;segment:"Server";codename:"Yorkfield_Xeon_[Penryn]";stepping:"C0";pf_model:0x91)
= 0x60f iucode_rev(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x40)
= 0x60f iucode_rev(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x40;segment:"Server";codename:"Harpertown_[Penryn]";stepping:"C0";pf_model:0x40)
= 0x60f iucode_rev(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x4)
= 0x60f iucode_rev(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x4;segment:"Server";codename:"Wolfdale-DP_[Penryn]";stepping:"M0";pf_model:0x4)
= 0x60f iucode_rev(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x80)
= 0x60f iucode_rev(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x80;segment:"Desktop";codename:"Wolfdale_[Penryn]";stepping:"M0";pf_model:0x91)
= 0x60f iucode_rev(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x80;segment:"Desktop";codename:"Yorkfield_[Penryn]";stepping:"C0";pf_model:0x91)
= 0x60f iucode_rev(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x80;segment:"Mobile";codename:"Penryn";stepping:"C0";pf_model:0x91)
= 0x60f iucode_rev(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x80;segment:"Server";codename:"Wolfdale_Xeon_[Penryn]";stepping:"C0";pf_model:0x91)
= 0x60f iucode_rev(fname:intel/06-17-06;cpuid:00010676;pf_mask:0x80;segment:"Server";codename:"Yorkfield_Xeon_[Penryn]";stepping:"C0";pf_model:0x91)
= 0x60f iucode_rev(fname:intel/06-17-06;platform_id:0x10)
= 0x60f iucode_rev(fname:intel/06-17-06;platform_id:0x1)
= 0x60f iucode_rev(fname:intel/06-17-06;platform_id:0x40)
= 0x60f iucode_rev(fname:intel/06-17-06;platform_id:0x4)
= 0x60f iucode_rev(fname:intel/06-17-06;platform_id:0x80)
= 0x70a iucode_rev(fname:intel/06-17-07;cpuid:00010677;pf_mask:0x10)
= 0x70a iucode_rev(fname:intel/06-17-07;cpuid:00010677;pf_mask:0x10;segment:"Desktop";codename:"Yorkfield_[Penryn]";stepping:"C1";pf_model:0x10)
= 0x70a iucode_rev(fname:intel/06-17-07;cpuid:00010677;pf_mask:0x10;segment:"Desktop";codename:"Yorkfield_[Penryn]";stepping:"M1";pf_model:0x10)
= 0x70a iucode_rev(fname:intel/06-17-07;cpuid:00010677;pf_mask:0x10;segment:"Server";codename:"Yorkfield_Xeon_[Penryn]";stepping:"C1";pf_model:0x10)
= 0x70a iucode_rev(fname:intel/06-17-07;cpuid:00010677;pf_mask:0x10;segment:"Server";codename:"Yorkfield_Xeon_[Penryn]";stepping:"M1";pf_model:0x10)
= 0x70a iucode_rev(fname:intel/06-17-07;platform_id:0x10)
= 0xa0b iucode_rev(fname:intel/06-17-0a;cpuid:0001067a;pf_mask:0x11)
= 0xa0b iucode_rev(fname:intel/06-17-0a;cpuid:0001067a;pf_mask:0x11;segment:"Desktop";codename:"Wolfdale_[Penryn]";stepping:"E0";pf_model:0xb1)
= 0xa0b iucode_rev(fname:intel/06-17-0a;cpuid:0001067a;pf_mask:0x11;segment:"Desktop";codename:"Wolfdale_[Penryn]";stepping:"R0";pf_model:0xb1)
= 0xa0b iucode_rev(fname:intel/06-17-0a;cpuid:0001067a;pf_mask:0x11;segment:"Mobile";codename:"Wolfdale_[Penryn]";stepping:"E0";pf_model:0xb1)
= 0xa0b iucode_rev(fname:intel/06-17-0a;cpuid:0001067a;pf_mask:0x11;segment:"Mobile";codename:"Wolfdale_[Penryn]";stepping:"R0";pf_model:0xb1)
= 0xa0b iucode_rev(fname:intel/06-17-0a;cpuid:0001067a;pf_mask:0x44)
= 0xa0b iucode_rev(fname:intel/06-17-0a;cpuid:0001067a;pf_mask:0x44;segment:"Server";codename:"Harpertown_[Penryn]";stepping:"E0";pf_model:0x44)
= 0xa0b iucode_rev(fname:intel/06-17-0a;cpuid:0001067a;pf_mask:0x44;segment:"Server";codename:"Wolfdale-DP_[Penryn]";stepping:"E0";pf_model:0x44)
= 0xa0b iucode_rev(fname:intel/06-17-0a;cpuid:0001067a;pf_mask:0xa0)
= 0xa0b iucode_rev(fname:intel/06-17-0a;cpuid:0001067a;pf_mask:0xa0;segment:"Desktop";codename:"Wolfdale_[Penryn]";stepping:"E0";pf_model:0xb1)
= 0xa0b iucode_rev(fname:intel/06-17-0a;cpuid:0001067a;pf_mask:0xa0;segment:"Desktop";codename:"Wolfdale_[Penryn]";stepping:"R0";pf_model:0xb1)
= 0xa0b iucode_rev(fname:intel/06-17-0a;cpuid:0001067a;pf_mask:0xa0;segment:"Mobile";codename:"Wolfdale_[Penryn]";stepping:"E0";pf_model:0xb1)
= 0xa0b iucode_rev(fname:intel/06-17-0a;cpuid:0001067a;pf_mask:0xa0;segment:"Mobile";codename:"Wolfdale_[Penryn]";stepping:"R0";pf_model:0xb1)
= 0xa0b iucode_rev(fname:intel/06-17-0a;platform_id:0x10)
= 0xa0b iucode_rev(fname:intel/06-17-0a;platform_id:0x1)
= 0xa0b iucode_rev(fname:intel/06-17-0a;platform_id:0x20)
= 0xa0b iucode_rev(fname:intel/06-17-0a;platform_id:0x40)
= 0xa0b iucode_rev(fname:intel/06-17-0a;platform_id:0x4)
= 0xa0b iucode_rev(fname:intel/06-17-0a;platform_id:0x80)
= 0x12 iucode_rev(fname:intel/06-1a-04;cpuid:000106a4;pf_mask:0x3)
= 0x12 iucode_rev(fname:intel/06-1a-04;cpuid:000106a4;pf_mask:0x3;segment:"Dekstop";codename:"Bloomfield_[Nehalem]";stepping:"C0";pf_model:0x3)
= 0x12 iucode_rev(fname:intel/06-1a-04;platform_id:0x1)
= 0x12 iucode_rev(fname:intel/06-1a-04;platform_id:0x2)
= 0x1d iucode_rev(fname:intel/06-1a-05;cpuid:000106a5;pf_mask:0x3)
= 0x1d iucode_rev(fname:intel/06-1a-05;cpuid:000106a5;pf_mask:0x3;segment:"Dekstop";codename:"Bloomfield_[Nehalem]";stepping:"D0";pf_model:0x3)
= 0x1d iucode_rev(fname:intel/06-1a-05;cpuid:000106a5;pf_mask:0x3;segment:"Server";codename:"Bloomfield_Xeon_[Nehalem]_EP";stepping:"D0";pf_model:0x3)
= 0x1d iucode_rev(fname:intel/06-1a-05;cpuid:000106a5;pf_mask:0x3;segment:"Server";codename:"Bloomfield_Xeon_[Nehalem]";stepping:"D0";pf_model:0x3)
= 0x1d iucode_rev(fname:intel/06-1a-05;cpuid:000106a5;pf_mask:0x3;segment:"Server";codename:"Bloomfield_Xeon_[Nehalem]_WS";stepping:"D0";pf_model:0x3)
= 0x1d iucode_rev(fname:intel/06-1a-05;platform_id:0x1)
= 0x1d iucode_rev(fname:intel/06-1a-05;platform_id:0x2)
= 0x217 iucode_rev(fname:intel/06-1c-02;cpuid:000106c2;pf_mask:0x1)
= 0x217 iucode_rev(fname:intel/06-1c-02;cpuid:000106c2;pf_mask:0x1;segment:"Mobile";codename:"Silverthorne_[Bonnell]";stepping:"C0";pf_model:0x1)
= 0x218 iucode_rev(fname:intel/06-1c-02;cpuid:000106c2;pf_mask:0x4)
= 0x218 iucode_rev(fname:intel/06-1c-02;cpuid:000106c2;pf_mask:0x4;segment:"Desktop";codename:"Diamondville_[Bonnell]";stepping:"C0";pf_model:0x4)
= 0x218 iucode_rev(fname:intel/06-1c-02;cpuid:000106c2;pf_mask:0x4;segment:"Mobile";codename:"Diamondville_[Bonnell]";stepping:"C0";pf_model:0x4)
= 0x219 iucode_rev(fname:intel/06-1c-02;cpuid:000106c2;pf_mask:0x8)
= 0x219 iucode_rev(fname:intel/06-1c-02;cpuid:000106c2;pf_mask:0x8;segment:"Desktop";codename:"Diamondville_[Bonnell]";stepping:"C0";pf_model:0x8)
= 0x217 iucode_rev(fname:intel/06-1c-02;platform_id:0x1)
= 0x218 iucode_rev(fname:intel/06-1c-02;platform_id:0x4)
= 0x219 iucode_rev(fname:intel/06-1c-02;platform_id:0x8)
= 0x107 iucode_rev(fname:intel/06-1c-0a;cpuid:000106ca;pf_mask:0x10)
= 0x107 iucode_rev(fname:intel/06-1c-0a;cpuid:000106ca;pf_mask:0x10;segment:"Desktop";codename:"Pineview_[Bonnell]";stepping:"B0";pf_model:0x18)
= 0x107 iucode_rev(fname:intel/06-1c-0a;cpuid:000106ca;pf_mask:0x10;segment:"Mobile";codename:"Pineview_[Bonnell]";stepping:"B0";pf_model:0x18)
= 0x107 iucode_rev(fname:intel/06-1c-0a;cpuid:000106ca;pf_mask:0x1)
= 0x107 iucode_rev(fname:intel/06-1c-0a;cpuid:000106ca;pf_mask:0x1;segment:"Desktop";codename:"Pineview_[Bonnell]";stepping:"A0";pf_model:0x5)
= 0x107 iucode_rev(fname:intel/06-1c-0a;cpuid:000106ca;pf_mask:0x1;segment:"Mobile";codename:"Pineview_[Bonnell]";stepping:"A0";pf_model:0x5)
= 0x107 iucode_rev(fname:intel/06-1c-0a;cpuid:000106ca;pf_mask:0x4)
= 0x107 iucode_rev(fname:intel/06-1c-0a;cpuid:000106ca;pf_mask:0x4;segment:"Desktop";codename:"Pineview_[Bonnell]";stepping:"A0";pf_model:0x5)
= 0x107 iucode_rev(fname:intel/06-1c-0a;cpuid:000106ca;pf_mask:0x4;segment:"Mobile";codename:"Pineview_[Bonnell]";stepping:"A0";pf_model:0x5)
= 0x107 iucode_rev(fname:intel/06-1c-0a;cpuid:000106ca;pf_mask:0x8)
= 0x107 iucode_rev(fname:intel/06-1c-0a;cpuid:000106ca;pf_mask:0x8;segment:"Desktop";codename:"Pineview_[Bonnell]";stepping:"B0";pf_model:0x18)
= 0x107 iucode_rev(fname:intel/06-1c-0a;cpuid:000106ca;pf_mask:0x8;segment:"Mobile";codename:"Pineview_[Bonnell]";stepping:"B0";pf_model:0x18)
= 0x107 iucode_rev(fname:intel/06-1c-0a;platform_id:0x10)
= 0x107 iucode_rev(fname:intel/06-1c-0a;platform_id:0x1)
= 0x107 iucode_rev(fname:intel/06-1c-0a;platform_id:0x4)
= 0x107 iucode_rev(fname:intel/06-1c-0a;platform_id:0x8)
= 0x29 iucode_rev(fname:intel/06-1d-01;cpuid:000106d1;pf_mask:0x8)
= 0x29 iucode_rev(fname:intel/06-1d-01;cpuid:000106d1;pf_mask:0x8;segment:"Server";codename:"Dunnington_[Penryn]";stepping:"A1";pf_model:0x8)
= 0x29 iucode_rev(fname:intel/06-1d-01;platform_id:0x8)
= 0xa iucode_rev(fname:intel/06-1e-05;cpuid:000106e5;pf_mask:0x13)
= 0xa iucode_rev(fname:intel/06-1e-05;cpuid:000106e5;pf_mask:0x13;segment:"Dekstop";codename:"Lynnfield_[Nehalem]";stepping:"B1";pf_model:0x13)
= 0xa iucode_rev(fname:intel/06-1e-05;cpuid:000106e5;pf_mask:0x13;segment:"Mobile";codename:"Clarksfield_[Nehalem]";stepping:"B1";pf_model:0x13)
= 0xa iucode_rev(fname:intel/06-1e-05;cpuid:000106e5;pf_mask:0x13;segment:"Server";codename:"Lynnfield_Xeon_[Nehalem]";stepping:"B1";pf_model:0x13)
= 0xa iucode_rev(fname:intel/06-1e-05;platform_id:0x10)
= 0xa iucode_rev(fname:intel/06-1e-05;platform_id:0x1)
= 0xa iucode_rev(fname:intel/06-1e-05;platform_id:0x2)
= 0x11 iucode_rev(fname:intel/06-25-02;cpuid:00020652;pf_mask:0x12)
= 0x11 iucode_rev(fname:intel/06-25-02;cpuid:00020652;pf_mask:0x12;segment:"Desktop";codename:"Westmere";stepping:"C2";pf_model:0x12)
= 0x11 iucode_rev(fname:intel/06-25-02;cpuid:00020652;pf_mask:0x12;segment:"Desktop";codename:"Westmere";stepping:"K0";pf_model:0x12)
= 0x11 iucode_rev(fname:intel/06-25-02;cpuid:00020652;pf_mask:0x12;segment:"Mobile";codename:"Westmere";stepping:"C2";pf_model:0x12)
= 0x11 iucode_rev(fname:intel/06-25-02;cpuid:00020652;pf_mask:0x12;segment:"Mobile";codename:"Westmere";stepping:"K0";pf_model:0x12)
= 0x11 iucode_rev(fname:intel/06-25-02;cpuid:00020652;pf_mask:0x12;segment:"Server";codename:"Westmere";stepping:"C2";pf_model:0x12)
= 0x11 iucode_rev(fname:intel/06-25-02;cpuid:00020652;pf_mask:0x12;segment:"Server";codename:"Westmere";stepping:"K0";pf_model:0x12)
= 0x11 iucode_rev(fname:intel/06-25-02;platform_id:0x10)
= 0x11 iucode_rev(fname:intel/06-25-02;platform_id:0x2)
= 0x7 iucode_rev(fname:intel/06-25-05;cpuid:00020655;pf_mask:0x92)
= 0x7 iucode_rev(fname:intel/06-25-05;cpuid:00020655;pf_mask:0x92;segment:"Desktop";codename:"Clarkdale_[Westmere]";stepping:"K0";pf_model:0x92)
= 0x7 iucode_rev(fname:intel/06-25-05;cpuid:00020655;pf_mask:0x92;segment:"Mobile";codename:"Arrandale_[Westmere]";stepping:"K0";pf_model:0x92)
= 0x7 iucode_rev(fname:intel/06-25-05;platform_id:0x10)
= 0x7 iucode_rev(fname:intel/06-25-05;platform_id:0x2)
= 0x7 iucode_rev(fname:intel/06-25-05;platform_id:0x80)
= 0x104 iucode_rev(fname:intel/06-26-01;cpuid:00020661;pf_mask:0x1)
= 0x104 iucode_rev(fname:intel/06-26-01;cpuid:00020661;pf_mask:0x1;segment:"SOC";codename:"Lincroft_[Bonnell]";stepping:"C0";pf_model:0x1)
= 0x105 iucode_rev(fname:intel/06-26-01;cpuid:00020661;pf_mask:0x2)
= 0x105 iucode_rev(fname:intel/06-26-01;cpuid:00020661;pf_mask:0x2;segment:"SOC";codename:"Tunnell_Creek_[Bonnell]";stepping:"B0";pf_model:0x2)
= 0x105 iucode_rev(fname:intel/06-26-01;cpuid:00020661;pf_mask:0x2;segment:"SOC";codename:"Tunnell_Creek_[Bonnell]";stepping:"B1";pf_model:0x2)
= 0x104 iucode_rev(fname:intel/06-26-01;platform_id:0x1)
= 0x105 iucode_rev(fname:intel/06-26-01;platform_id:0x2)
= 0x2f iucode_rev(fname:intel/06-2a-07;cpuid:000206a7;pf_mask:0x12)
= 0x2f iucode_rev(fname:intel/06-2a-07;cpuid:000206a7;pf_mask:0x12;segment:"Desktop";codename:"Sandy_Bridge";stepping:"D2";pf_model:0x12)
= 0x2f iucode_rev(fname:intel/06-2a-07;cpuid:000206a7;pf_mask:0x12;segment:"Desktop";codename:"Sandy_Bridge";stepping:"J1";pf_model:0x12)
= 0x2f iucode_rev(fname:intel/06-2a-07;cpuid:000206a7;pf_mask:0x12;segment:"Desktop";codename:"Sandy_Bridge";stepping:"Q0";pf_model:0x12)
= 0x2f iucode_rev(fname:intel/06-2a-07;cpuid:000206a7;pf_mask:0x12;segment:"Mobile";codename:"Sandy_Bridge";stepping:"D2";pf_model:0x12)
= 0x2f iucode_rev(fname:intel/06-2a-07;cpuid:000206a7;pf_mask:0x12;segment:"Mobile";codename:"Sandy_Bridge";stepping:"J1";pf_model:0x12)
= 0x2f iucode_rev(fname:intel/06-2a-07;cpuid:000206a7;pf_mask:0x12;segment:"Mobile";codename:"Sandy_Bridge";stepping:"Q0";pf_model:0x12)
= 0x2f iucode_rev(fname:intel/06-2a-07;cpuid:000206a7;pf_mask:0x12;segment:"Server";codename:"Sandy_Bridge";stepping:"D2";pf_model:0x12)
= 0x2f iucode_rev(fname:intel/06-2a-07;cpuid:000206a7;pf_mask:0x12;segment:"Server";codename:"Sandy_Bridge";stepping:"Q0";pf_model:0x12)
= 0x2f iucode_rev(fname:intel/06-2a-07;cpuid:000206a7;pf_mask:0x12;segment:"Server";codename:"Sandy_Bridge_Xeon_E3";stepping:"D2";pf_model:0x12)
= 0x2f iucode_rev(fname:intel/06-2a-07;cpuid:000206a7;pf_mask:0x12;segment:"Server";codename:"Sandy_Bridge_Xeon_E3";stepping:"Q0";pf_model:0x12)
= 0x2f iucode_rev(fname:intel/06-2a-07;platform_id:0x10)
= 0x2f iucode_rev(fname:intel/06-2a-07;platform_id:0x2)
= 0x1f iucode_rev(fname:intel/06-2c-02;cpuid:000206c2;pf_mask:0x3)
= 0x1f iucode_rev(fname:intel/06-2c-02;cpuid:000206c2;pf_mask:0x3;segment:"Desktop";codename:"Gulftown_[Westmere]";stepping:"B1";pf_model:0x3)
= 0x1f iucode_rev(fname:intel/06-2c-02;cpuid:000206c2;pf_mask:0x3;segment:"Server";codename:"Westmere-EP_EP";stepping:"B1";pf_model:0x3)
= 0x1f iucode_rev(fname:intel/06-2c-02;cpuid:000206c2;pf_mask:0x3;segment:"Server";codename:"Westmere-EP";stepping:"B1";pf_model:0x3)
= 0x1f iucode_rev(fname:intel/06-2c-02;cpuid:000206c2;pf_mask:0x3;segment:"Server";codename:"Westmere-WS";stepping:"B1";pf_model:0x3)
= 0x1f iucode_rev(fname:intel/06-2c-02;cpuid:000206c2;pf_mask:0x3;segment:"Server";codename:"Westmere-WS_WS";stepping:"B1";pf_model:0x3)
= 0x1f iucode_rev(fname:intel/06-2c-02;platform_id:0x1)
= 0x1f iucode_rev(fname:intel/06-2c-02;platform_id:0x2)
= 0x621 iucode_rev(fname:intel/06-2d-06;cpuid:000206d6;pf_mask:0x6d)
= 0x621 iucode_rev(fname:intel/06-2d-06;cpuid:000206d6;pf_mask:0x6d;segment:"Desktop";codename:"Sandy_Bridge_E";stepping:"C1";pf_model:0x6d)
= 0x621 iucode_rev(fname:intel/06-2d-06;cpuid:000206d6;pf_mask:0x6d;segment:"Desktop";codename:"Sandy_Bridge_E";stepping:"M0";pf_model:0x6d)
= 0x621 iucode_rev(fname:intel/06-2d-06;cpuid:000206d6;pf_mask:0x6d;segment:"Desktop";codename:"Sandy_Bridge";stepping:"C1";pf_model:0x6d)
= 0x621 iucode_rev(fname:intel/06-2d-06;cpuid:000206d6;pf_mask:0x6d;segment:"Desktop";codename:"Sandy_Bridge";stepping:"M0";pf_model:0x6d)
= 0x621 iucode_rev(fname:intel/06-2d-06;cpuid:000206d6;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge_EN";stepping:"C1";pf_model:0x6d)
= 0x621 iucode_rev(fname:intel/06-2d-06;cpuid:000206d6;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge_EN";stepping:"M0";pf_model:0x6d)
= 0x621 iucode_rev(fname:intel/06-2d-06;cpuid:000206d6;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge_EP";stepping:"C1";pf_model:0x6d)
= 0x621 iucode_rev(fname:intel/06-2d-06;cpuid:000206d6;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge_EP";stepping:"M0";pf_model:0x6d)
= 0x621 iucode_rev(fname:intel/06-2d-06;cpuid:000206d6;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge";stepping:"C1";pf_model:0x6d)
= 0x621 iucode_rev(fname:intel/06-2d-06;cpuid:000206d6;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge";stepping:"M0";pf_model:0x6d)
= 0x621 iucode_rev(fname:intel/06-2d-06;platform_id:0x1)
= 0x621 iucode_rev(fname:intel/06-2d-06;platform_id:0x20)
= 0x621 iucode_rev(fname:intel/06-2d-06;platform_id:0x40)
= 0x621 iucode_rev(fname:intel/06-2d-06;platform_id:0x4)
= 0x621 iucode_rev(fname:intel/06-2d-06;platform_id:0x8)
= 0x71a iucode_rev(fname:intel-06-2d-07/06-2d-07;cpuid:000206d7;pf_mask:0x6d)
= 0x71a iucode_rev(fname:intel-06-2d-07/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Desktop";codename:"Sandy_Bridge_E";stepping:"C2";pf_model:0x6d)
= 0x71a iucode_rev(fname:intel-06-2d-07/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Desktop";codename:"Sandy_Bridge_E";stepping:"M1";pf_model:0x6d)
= 0x71a iucode_rev(fname:intel-06-2d-07/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Desktop";codename:"Sandy_Bridge";stepping:"C2";pf_model:0x6d)
= 0x71a iucode_rev(fname:intel-06-2d-07/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Desktop";codename:"Sandy_Bridge";stepping:"M1";pf_model:0x6d)
= 0x71a iucode_rev(fname:intel-06-2d-07/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge_EN";stepping:"C2";pf_model:0x6d)
= 0x71a iucode_rev(fname:intel-06-2d-07/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge_EN";stepping:"M1";pf_model:0x6d)
= 0x71a iucode_rev(fname:intel-06-2d-07/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge_EP";stepping:"C2";pf_model:0x6d)
= 0x71a iucode_rev(fname:intel-06-2d-07/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge_EP";stepping:"M1";pf_model:0x6d)
= 0x71a iucode_rev(fname:intel-06-2d-07/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge";stepping:"C2";pf_model:0x6d)
= 0x71a iucode_rev(fname:intel-06-2d-07/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge";stepping:"M1";pf_model:0x6d)
= 0x71a iucode_rev(fname:intel-06-2d-07/06-2d-07;platform_id:0x1)
= 0x71a iucode_rev(fname:intel-06-2d-07/06-2d-07;platform_id:0x20)
= 0x71a iucode_rev(fname:intel-06-2d-07/06-2d-07;platform_id:0x40)
= 0x71a iucode_rev(fname:intel-06-2d-07/06-2d-07;platform_id:0x4)
= 0x71a iucode_rev(fname:intel-06-2d-07/06-2d-07;platform_id:0x8)
= 0x714 iucode_rev(fname:intel/06-2d-07;cpuid:000206d7;pf_mask:0x6d)
= 0x714 iucode_rev(fname:intel/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Desktop";codename:"Sandy_Bridge_E";stepping:"C2";pf_model:0x6d)
= 0x714 iucode_rev(fname:intel/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Desktop";codename:"Sandy_Bridge_E";stepping:"M1";pf_model:0x6d)
= 0x714 iucode_rev(fname:intel/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Desktop";codename:"Sandy_Bridge";stepping:"C2";pf_model:0x6d)
= 0x714 iucode_rev(fname:intel/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Desktop";codename:"Sandy_Bridge";stepping:"M1";pf_model:0x6d)
= 0x714 iucode_rev(fname:intel/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge_EN";stepping:"C2";pf_model:0x6d)
= 0x714 iucode_rev(fname:intel/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge_EN";stepping:"M1";pf_model:0x6d)
= 0x714 iucode_rev(fname:intel/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge_EP";stepping:"C2";pf_model:0x6d)
= 0x714 iucode_rev(fname:intel/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge_EP";stepping:"M1";pf_model:0x6d)
= 0x714 iucode_rev(fname:intel/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge";stepping:"C2";pf_model:0x6d)
= 0x714 iucode_rev(fname:intel/06-2d-07;cpuid:000206d7;pf_mask:0x6d;segment:"Server";codename:"Sandy_Bridge";stepping:"M1";pf_model:0x6d)
= 0x714 iucode_rev(fname:intel/06-2d-07;platform_id:0x1)
= 0x714 iucode_rev(fname:intel/06-2d-07;platform_id:0x20)
= 0x714 iucode_rev(fname:intel/06-2d-07;platform_id:0x40)
= 0x714 iucode_rev(fname:intel/06-2d-07;platform_id:0x4)
= 0x714 iucode_rev(fname:intel/06-2d-07;platform_id:0x8)
= 0xd iucode_rev(fname:intel/06-2e-06;cpuid:000206e6;pf_mask:0x4)
= 0xd iucode_rev(fname:intel/06-2e-06;cpuid:000206e6;pf_mask:0x4;segment:"Server";codename:"Nehalem_EX";stepping:"D0";pf_model:0x4)
= 0xd iucode_rev(fname:intel/06-2e-06;cpuid:000206e6;pf_mask:0x4;segment:"Server";codename:"Nehalem";stepping:"D0";pf_model:0x4)
= 0xd iucode_rev(fname:intel/06-2e-06;platform_id:0x4)
= 0x3b iucode_rev(fname:intel/06-2f-02;cpuid:000206f2;pf_mask:0x5)
= 0x3b iucode_rev(fname:intel/06-2f-02;cpuid:000206f2;pf_mask:0x5;segment:"Server";codename:"Westmere-EX_EX";stepping:"A2";pf_model:0x5)
= 0x3b iucode_rev(fname:intel/06-2f-02;cpuid:000206f2;pf_mask:0x5;segment:"Server";codename:"Westmere-EX";stepping:"A2";pf_model:0x5)
= 0x3b iucode_rev(fname:intel/06-2f-02;platform_id:0x1)
= 0x3b iucode_rev(fname:intel/06-2f-02;platform_id:0x4)
= 0x838 iucode_rev(fname:intel/06-37-08;cpuid:00030678;pf_mask:0x2)
= 0x838 iucode_rev(fname:intel/06-37-08;cpuid:00030678;pf_mask:0x2;segment:"SOC";codename:"Valleyview";stepping:"C0";pf_model:0x2)
= 0x838 iucode_rev(fname:intel/06-37-08;cpuid:00030678;pf_mask:0xc)
= 0x838 iucode_rev(fname:intel/06-37-08;cpuid:00030678;pf_mask:0xc;segment:"SOC";codename:"Valleyview";stepping:"C0";pf_model:0xc)
= 0x838 iucode_rev(fname:intel/06-37-08;platform_id:0x2)
= 0x838 iucode_rev(fname:intel/06-37-08;platform_id:0x4)
= 0x838 iucode_rev(fname:intel/06-37-08;platform_id:0x8)
= 0x90d iucode_rev(fname:intel/06-37-09;cpuid:00030679;pf_mask:0xf)
= 0x90d iucode_rev(fname:intel/06-37-09;cpuid:00030679;pf_mask:0xf;segment:"SOC";codename:"Valleyview";stepping:"D0";pf_model:0xf)
= 0x90d iucode_rev(fname:intel/06-37-09;platform_id:0x1)
= 0x90d iucode_rev(fname:intel/06-37-09;platform_id:0x2)
= 0x90d iucode_rev(fname:intel/06-37-09;platform_id:0x4)
= 0x90d iucode_rev(fname:intel/06-37-09;platform_id:0x8)
= 0x21 iucode_rev(fname:intel/06-3a-09;cpuid:000306a9;pf_mask:0x12)
= 0x21 iucode_rev(fname:intel/06-3a-09;cpuid:000306a9;pf_mask:0x12;segment:"Desktop";codename:"Ivy_Bridge";stepping:"E1";pf_model:0x12)
= 0x21 iucode_rev(fname:intel/06-3a-09;cpuid:000306a9;pf_mask:0x12;segment:"Desktop";codename:"Ivy_Bridge";stepping:"E2";pf_model:0x12)
= 0x21 iucode_rev(fname:intel/06-3a-09;cpuid:000306a9;pf_mask:0x12;segment:"Desktop";codename:"Ivy_Bridge";stepping:"L1";pf_model:0x12)
= 0x21 iucode_rev(fname:intel/06-3a-09;cpuid:000306a9;pf_mask:0x12;segment:"Mobile";codename:"Ivy_Bridge";stepping:"E1";pf_model:0x12)
= 0x21 iucode_rev(fname:intel/06-3a-09;cpuid:000306a9;pf_mask:0x12;segment:"Mobile";codename:"Ivy_Bridge";stepping:"E2";pf_model:0x12)
= 0x21 iucode_rev(fname:intel/06-3a-09;cpuid:000306a9;pf_mask:0x12;segment:"Mobile";codename:"Ivy_Bridge";stepping:"L1";pf_model:0x12)
= 0x21 iucode_rev(fname:intel/06-3a-09;cpuid:000306a9;pf_mask:0x12;segment:"Server";codename:"Ivy_Bridge";stepping:"E1";pf_model:0x12)
= 0x21 iucode_rev(fname:intel/06-3a-09;cpuid:000306a9;pf_mask:0x12;segment:"Server";codename:"Ivy_Bridge";stepping:"E2";pf_model:0x12)
= 0x21 iucode_rev(fname:intel/06-3a-09;cpuid:000306a9;pf_mask:0x12;segment:"Server";codename:"Ivy_Bridge";stepping:"L1";pf_model:0x12)
= 0x21 iucode_rev(fname:intel/06-3a-09;platform_id:0x10)
= 0x21 iucode_rev(fname:intel/06-3a-09;platform_id:0x2)
= 0x28 iucode_rev(fname:intel/06-3c-03;cpuid:000306c3;pf_mask:0x32)
= 0x28 iucode_rev(fname:intel/06-3c-03;cpuid:000306c3;pf_mask:0x32;segment:"Desktop";codename:"Haswell_S";stepping:"Cx";pf_model:0x32)
= 0x28 iucode_rev(fname:intel/06-3c-03;cpuid:000306c3;pf_mask:0x32;segment:"Desktop";codename:"Haswell_S";stepping:"Dx";pf_model:0x32)
= 0x28 iucode_rev(fname:intel/06-3c-03;cpuid:000306c3;pf_mask:0x32;segment:"Desktop";codename:"Haswell";stepping:"Cx";pf_model:0x32)
= 0x28 iucode_rev(fname:intel/06-3c-03;cpuid:000306c3;pf_mask:0x32;segment:"Desktop";codename:"Haswell";stepping:"Dx";pf_model:0x32)
= 0x28 iucode_rev(fname:intel/06-3c-03;cpuid:000306c3;pf_mask:0x32;segment:"Mobile";codename:"Haswell_H";stepping:"Cx";pf_model:0x32)
= 0x28 iucode_rev(fname:intel/06-3c-03;cpuid:000306c3;pf_mask:0x32;segment:"Mobile";codename:"Haswell_H";stepping:"Dx";pf_model:0x32)
= 0x28 iucode_rev(fname:intel/06-3c-03;cpuid:000306c3;pf_mask:0x32;segment:"Mobile";codename:"Haswell";stepping:"Cx";pf_model:0x32)
= 0x28 iucode_rev(fname:intel/06-3c-03;cpuid:000306c3;pf_mask:0x32;segment:"Mobile";codename:"Haswell";stepping:"Dx";pf_model:0x32)
= 0x28 iucode_rev(fname:intel/06-3c-03;cpuid:000306c3;pf_mask:0x32;segment:"Server";codename:"Haswell";stepping:"Cx";pf_model:0x32)
= 0x28 iucode_rev(fname:intel/06-3c-03;cpuid:000306c3;pf_mask:0x32;segment:"Server";codename:"Haswell";stepping:"Dx";pf_model:0x32)
= 0x28 iucode_rev(fname:intel/06-3c-03;cpuid:000306c3;pf_mask:0x32;segment:"Server";codename:"Haswell_Xeon_E3";stepping:"Cx";pf_model:0x32)
= 0x28 iucode_rev(fname:intel/06-3c-03;cpuid:000306c3;pf_mask:0x32;segment:"Server";codename:"Haswell_Xeon_E3";stepping:"Dx";pf_model:0x32)
= 0x28 iucode_rev(fname:intel/06-3c-03;platform_id:0x10)
= 0x28 iucode_rev(fname:intel/06-3c-03;platform_id:0x20)
= 0x28 iucode_rev(fname:intel/06-3c-03;platform_id:0x2)
= 0x2f iucode_rev(fname:intel/06-3d-04;cpuid:000306d4;pf_mask:0xc0)
= 0x2f iucode_rev(fname:intel/06-3d-04;cpuid:000306d4;pf_mask:0xc0;segment:"Mobile";codename:"Broadwell";stepping:"E0";pf_model:0xc0)
= 0x2f iucode_rev(fname:intel/06-3d-04;cpuid:000306d4;pf_mask:0xc0;segment:"Mobile";codename:"Broadwell";stepping:"F0";pf_model:0xc0)
= 0x2f iucode_rev(fname:intel/06-3d-04;cpuid:000306d4;pf_mask:0xc0;segment:"Mobile";codename:"Broadwell_U";stepping:"E0";pf_model:0xc0)
= 0x2f iucode_rev(fname:intel/06-3d-04;cpuid:000306d4;pf_mask:0xc0;segment:"Mobile";codename:"Broadwell_U";stepping:"F0";pf_model:0xc0)
= 0x2f iucode_rev(fname:intel/06-3d-04;cpuid:000306d4;pf_mask:0xc0;segment:"Mobile";codename:"Broadwell_Y";stepping:"E0";pf_model:0xc0)
= 0x2f iucode_rev(fname:intel/06-3d-04;cpuid:000306d4;pf_mask:0xc0;segment:"Mobile";codename:"Broadwell_Y";stepping:"F0";pf_model:0xc0)
= 0x2f iucode_rev(fname:intel/06-3d-04;platform_id:0x40)
= 0x2f iucode_rev(fname:intel/06-3d-04;platform_id:0x80)
= 0x42e iucode_rev(fname:intel/06-3e-04;cpuid:000306e4;pf_mask:0xed)
= 0x42e iucode_rev(fname:intel/06-3e-04;cpuid:000306e4;pf_mask:0xed;segment:"Desktop";codename:"Ivy_Bridge_E";stepping:"S1";pf_model:0xed)
= 0x42e iucode_rev(fname:intel/06-3e-04;cpuid:000306e4;pf_mask:0xed;segment:"Desktop";codename:"Ivy_Bridge";stepping:"S1";pf_model:0xed)
= 0x42e iucode_rev(fname:intel/06-3e-04;cpuid:000306e4;pf_mask:0xed;segment:"Server";codename:"Ivy_Bridge_EP";stepping:"C0";pf_model:0xed)
= 0x42e iucode_rev(fname:intel/06-3e-04;cpuid:000306e4;pf_mask:0xed;segment:"Server";codename:"Ivy_Bridge_EP";stepping:"C1";pf_model:0xed)
= 0x42e iucode_rev(fname:intel/06-3e-04;cpuid:000306e4;pf_mask:0xed;segment:"Server";codename:"Ivy_Bridge_EP";stepping:"M1";pf_model:0xed)
= 0x42e iucode_rev(fname:intel/06-3e-04;cpuid:000306e4;pf_mask:0xed;segment:"Server";codename:"Ivy_Bridge_EP";stepping:"S1";pf_model:0xed)
= 0x42e iucode_rev(fname:intel/06-3e-04;cpuid:000306e4;pf_mask:0xed;segment:"Server";codename:"Ivy_Bridge";stepping:"C0";pf_model:0xed)
= 0x42e iucode_rev(fname:intel/06-3e-04;cpuid:000306e4;pf_mask:0xed;segment:"Server";codename:"Ivy_Bridge";stepping:"C1";pf_model:0xed)
= 0x42e iucode_rev(fname:intel/06-3e-04;cpuid:000306e4;pf_mask:0xed;segment:"Server";codename:"Ivy_Bridge";stepping:"M1";pf_model:0xed)
= 0x42e iucode_rev(fname:intel/06-3e-04;cpuid:000306e4;pf_mask:0xed;segment:"Server";codename:"Ivy_Bridge";stepping:"S1";pf_model:0xed)
= 0x42e iucode_rev(fname:intel/06-3e-04;platform_id:0x1)
= 0x42e iucode_rev(fname:intel/06-3e-04;platform_id:0x20)
= 0x42e iucode_rev(fname:intel/06-3e-04;platform_id:0x40)
= 0x42e iucode_rev(fname:intel/06-3e-04;platform_id:0x4)
= 0x42e iucode_rev(fname:intel/06-3e-04;platform_id:0x80)
= 0x42e iucode_rev(fname:intel/06-3e-04;platform_id:0x8)
= 0x600 iucode_rev(fname:intel/06-3e-06;cpuid:000306e6;pf_mask:0xed)
= 0x600 iucode_rev(fname:intel/06-3e-06;platform_id:0x1)
= 0x600 iucode_rev(fname:intel/06-3e-06;platform_id:0x20)
= 0x600 iucode_rev(fname:intel/06-3e-06;platform_id:0x40)
= 0x600 iucode_rev(fname:intel/06-3e-06;platform_id:0x4)
= 0x600 iucode_rev(fname:intel/06-3e-06;platform_id:0x80)
= 0x600 iucode_rev(fname:intel/06-3e-06;platform_id:0x8)
= 0x715 iucode_rev(fname:intel/06-3e-07;cpuid:000306e7;pf_mask:0xed)
= 0x715 iucode_rev(fname:intel/06-3e-07;cpuid:000306e7;pf_mask:0xed;segment:"Server";codename:"Ivy_Bridge_EX";stepping:"D1";pf_model:0xed)
= 0x715 iucode_rev(fname:intel/06-3e-07;cpuid:000306e7;pf_mask:0xed;segment:"Server";codename:"Ivy_Bridge";stepping:"D1";pf_model:0xed)
= 0x715 iucode_rev(fname:intel/06-3e-07;platform_id:0x1)
= 0x715 iucode_rev(fname:intel/06-3e-07;platform_id:0x20)
= 0x715 iucode_rev(fname:intel/06-3e-07;platform_id:0x40)
= 0x715 iucode_rev(fname:intel/06-3e-07;platform_id:0x4)
= 0x715 iucode_rev(fname:intel/06-3e-07;platform_id:0x80)
= 0x715 iucode_rev(fname:intel/06-3e-07;platform_id:0x8)
= 0x49 iucode_rev(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f)
= 0x49 iucode_rev(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Desktop";codename:"Haswell_E";stepping:"C0";pf_model:0x6f)
= 0x49 iucode_rev(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Desktop";codename:"Haswell_E";stepping:"C1";pf_model:0x6f)
= 0x49 iucode_rev(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Desktop";codename:"Haswell_E";stepping:"M1";pf_model:0x6f)
= 0x49 iucode_rev(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Desktop";codename:"Haswell_E";stepping:"R2";pf_model:0x6f)
= 0x49 iucode_rev(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Desktop";codename:"Haswell";stepping:"C0";pf_model:0x6f)
= 0x49 iucode_rev(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Desktop";codename:"Haswell";stepping:"C1";pf_model:0x6f)
= 0x49 iucode_rev(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Desktop";codename:"Haswell";stepping:"M1";pf_model:0x6f)
= 0x49 iucode_rev(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Desktop";codename:"Haswell";stepping:"R2";pf_model:0x6f)
= 0x49 iucode_rev(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell_EN";stepping:"C0";pf_model:0x6f)
= 0x49 iucode_rev(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell_EN";stepping:"C1";pf_model:0x6f)
= 0x49 iucode_rev(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell_EN";stepping:"M1";pf_model:0x6f)
= 0x49 iucode_rev(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell_EN";stepping:"R2";pf_model:0x6f)
= 0x49 iucode_rev(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell_EP_4S";stepping:"C0";pf_model:0x6f)
= 0x49 iucode_rev(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell_EP_4S";stepping:"C1";pf_model:0x6f)
= 0x49 iucode_rev(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell_EP_4S";stepping:"M1";pf_model:0x6f)
= 0x49 iucode_rev(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell_EP_4S";stepping:"R2";pf_model:0x6f)
= 0x49 iucode_rev(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell_EP";stepping:"C0";pf_model:0x6f)
= 0x49 iucode_rev(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell_EP";stepping:"C1";pf_model:0x6f)
= 0x49 iucode_rev(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell_EP";stepping:"M1";pf_model:0x6f)
= 0x49 iucode_rev(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell_EP";stepping:"R2";pf_model:0x6f)
= 0x49 iucode_rev(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell";stepping:"C0";pf_model:0x6f)
= 0x49 iucode_rev(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell";stepping:"C1";pf_model:0x6f)
= 0x49 iucode_rev(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell";stepping:"M1";pf_model:0x6f)
= 0x49 iucode_rev(fname:intel/06-3f-02;cpuid:000306f2;pf_mask:0x6f;segment:"Server";codename:"Haswell";stepping:"R2";pf_model:0x6f)
= 0x49 iucode_rev(fname:intel/06-3f-02;platform_id:0x1)
= 0x49 iucode_rev(fname:intel/06-3f-02;platform_id:0x20)
= 0x49 iucode_rev(fname:intel/06-3f-02;platform_id:0x2)
= 0x49 iucode_rev(fname:intel/06-3f-02;platform_id:0x40)
= 0x49 iucode_rev(fname:intel/06-3f-02;platform_id:0x4)
= 0x49 iucode_rev(fname:intel/06-3f-02;platform_id:0x8)
= 0x1a iucode_rev(fname:intel/06-3f-04;cpuid:000306f4;pf_mask:0x80)
= 0x1a iucode_rev(fname:intel/06-3f-04;cpuid:000306f4;pf_mask:0x80;segment:"Server";codename:"Haswell_EX";stepping:"E0";pf_model:0x80)
= 0x1a iucode_rev(fname:intel/06-3f-04;cpuid:000306f4;pf_mask:0x80;segment:"Server";codename:"Haswell";stepping:"E0";pf_model:0x80)
= 0x1a iucode_rev(fname:intel/06-3f-04;platform_id:0x80)
= 0x26 iucode_rev(fname:intel/06-45-01;cpuid:00040651;pf_mask:0x72)
= 0x26 iucode_rev(fname:intel/06-45-01;cpuid:00040651;pf_mask:0x72;segment:"Mobile";codename:"Haswell";stepping:"Cx";pf_model:0x72)
= 0x26 iucode_rev(fname:intel/06-45-01;cpuid:00040651;pf_mask:0x72;segment:"Mobile";codename:"Haswell";stepping:"Dx";pf_model:0x72)
= 0x26 iucode_rev(fname:intel/06-45-01;cpuid:00040651;pf_mask:0x72;segment:"Mobile";codename:"Haswell_U";stepping:"Cx";pf_model:0x72)
= 0x26 iucode_rev(fname:intel/06-45-01;cpuid:00040651;pf_mask:0x72;segment:"Mobile";codename:"Haswell_U";stepping:"Dx";pf_model:0x72)
= 0x26 iucode_rev(fname:intel/06-45-01;platform_id:0x10)
= 0x26 iucode_rev(fname:intel/06-45-01;platform_id:0x20)
= 0x26 iucode_rev(fname:intel/06-45-01;platform_id:0x2)
= 0x26 iucode_rev(fname:intel/06-45-01;platform_id:0x40)
= 0x1c iucode_rev(fname:intel/06-46-01;cpuid:00040661;pf_mask:0x32)
= 0x1c iucode_rev(fname:intel/06-46-01;cpuid:00040661;pf_mask:0x32;segment:"Desktop";codename:"Haswell_R";stepping:"Cx";pf_model:0x32)
= 0x1c iucode_rev(fname:intel/06-46-01;cpuid:00040661;pf_mask:0x32;segment:"Desktop";codename:"Haswell_R";stepping:"Dx";pf_model:0x32)
= 0x1c iucode_rev(fname:intel/06-46-01;cpuid:00040661;pf_mask:0x32;segment:"Desktop";codename:"Haswell";stepping:"Cx";pf_model:0x32)
= 0x1c iucode_rev(fname:intel/06-46-01;cpuid:00040661;pf_mask:0x32;segment:"Desktop";codename:"Haswell";stepping:"Dx";pf_model:0x32)
= 0x1c iucode_rev(fname:intel/06-46-01;cpuid:00040661;pf_mask:0x32;segment:"Mobile";codename:"Haswell_H";stepping:"Cx";pf_model:0x32)
= 0x1c iucode_rev(fname:intel/06-46-01;cpuid:00040661;pf_mask:0x32;segment:"Mobile";codename:"Haswell_H";stepping:"Dx";pf_model:0x32)
= 0x1c iucode_rev(fname:intel/06-46-01;cpuid:00040661;pf_mask:0x32;segment:"Mobile";codename:"Haswell";stepping:"Cx";pf_model:0x32)
= 0x1c iucode_rev(fname:intel/06-46-01;cpuid:00040661;pf_mask:0x32;segment:"Mobile";codename:"Haswell";stepping:"Dx";pf_model:0x32)
= 0x1c iucode_rev(fname:intel/06-46-01;platform_id:0x10)
= 0x1c iucode_rev(fname:intel/06-46-01;platform_id:0x20)
= 0x1c iucode_rev(fname:intel/06-46-01;platform_id:0x2)
= 0x22 iucode_rev(fname:intel/06-47-01;cpuid:00040671;pf_mask:0x22)
= 0x22 iucode_rev(fname:intel/06-47-01;cpuid:00040671;pf_mask:0x22;segment:"Desktop";codename:"Broadwell_S";stepping:"E0";pf_model:0x22)
= 0x22 iucode_rev(fname:intel/06-47-01;cpuid:00040671;pf_mask:0x22;segment:"Desktop";codename:"Broadwell_S";stepping:"G0";pf_model:0x22)
= 0x22 iucode_rev(fname:intel/06-47-01;cpuid:00040671;pf_mask:0x22;segment:"Desktop";codename:"Broadwell";stepping:"E0";pf_model:0x22)
= 0x22 iucode_rev(fname:intel/06-47-01;cpuid:00040671;pf_mask:0x22;segment:"Desktop";codename:"Broadwell";stepping:"G0";pf_model:0x22)
= 0x22 iucode_rev(fname:intel/06-47-01;cpuid:00040671;pf_mask:0x22;segment:"Mobile";codename:"Broadwell_H";stepping:"E0";pf_model:0x22)
= 0x22 iucode_rev(fname:intel/06-47-01;cpuid:00040671;pf_mask:0x22;segment:"Mobile";codename:"Broadwell_H";stepping:"G0";pf_model:0x22)
= 0x22 iucode_rev(fname:intel/06-47-01;cpuid:00040671;pf_mask:0x22;segment:"Mobile";codename:"Broadwell";stepping:"E0";pf_model:0x22)
= 0x22 iucode_rev(fname:intel/06-47-01;cpuid:00040671;pf_mask:0x22;segment:"Mobile";codename:"Broadwell";stepping:"G0";pf_model:0x22)
= 0x22 iucode_rev(fname:intel/06-47-01;cpuid:00040671;pf_mask:0x22;segment:"Server";codename:"Broadwell";stepping:"E0";pf_model:0x22)
= 0x22 iucode_rev(fname:intel/06-47-01;cpuid:00040671;pf_mask:0x22;segment:"Server";codename:"Broadwell";stepping:"G0";pf_model:0x22)
= 0x22 iucode_rev(fname:intel/06-47-01;cpuid:00040671;pf_mask:0x22;segment:"Server";codename:"Broadwell_Xeon_E3";stepping:"E0";pf_model:0x22)
= 0x22 iucode_rev(fname:intel/06-47-01;cpuid:00040671;pf_mask:0x22;segment:"Server";codename:"Broadwell_Xeon_E3";stepping:"G0";pf_model:0x22)
= 0x22 iucode_rev(fname:intel/06-47-01;platform_id:0x20)
= 0x22 iucode_rev(fname:intel/06-47-01;platform_id:0x2)
= 0x368 iucode_rev(fname:intel/06-4c-03;cpuid:000406c3;pf_mask:0x1)
= 0x368 iucode_rev(fname:intel/06-4c-03;cpuid:000406c3;pf_mask:0x1;segment:"SOC";codename:"Cherry_View";stepping:"C0";pf_model:0x1)
= 0x368 iucode_rev(fname:intel/06-4c-03;platform_id:0x1)
= 0x411 iucode_rev(fname:intel/06-4c-04;cpuid:000406c4;pf_mask:0x1)
= 0x411 iucode_rev(fname:intel/06-4c-04;cpuid:000406c4;pf_mask:0x1;segment:"SOC";codename:"Cherry_View";stepping:"D0";pf_model:0x1)
= 0x411 iucode_rev(fname:intel/06-4c-04;platform_id:0x1)
= 0x12d iucode_rev(fname:intel/06-4d-08;cpuid:000406d8;pf_mask:0x1)
= 0x12d iucode_rev(fname:intel/06-4d-08;cpuid:000406d8;pf_mask:0x1;segment:"SOC";codename:"Avoton";stepping:"B0";pf_model:0x1)
= 0x12d iucode_rev(fname:intel/06-4d-08;cpuid:000406d8;pf_mask:0x1;segment:"SOC";codename:"Avoton";stepping:"C0";pf_model:0x1)
= 0x12d iucode_rev(fname:intel/06-4d-08;platform_id:0x1)
= 0xf0 iucode_rev(fname:intel-06-4e-03/06-4e-03;cpuid:000406e3;pf_mask:0xc0)
= 0xf0 iucode_rev(fname:intel-06-4e-03/06-4e-03;cpuid:000406e3;pf_mask:0xc0;segment:"Mobile";codename:"Skylake";stepping:"D0";pf_model:0xc0)
= 0xf0 iucode_rev(fname:intel-06-4e-03/06-4e-03;cpuid:000406e3;pf_mask:0xc0;segment:"Mobile";codename:"Skylake";stepping:"K1";pf_model:0xc0)
= 0xf0 iucode_rev(fname:intel-06-4e-03/06-4e-03;cpuid:000406e3;pf_mask:0xc0;segment:"Mobile";codename:"Skylake_U_2+3e";stepping:"K1";pf_model:0xc0)
= 0xf0 iucode_rev(fname:intel-06-4e-03/06-4e-03;cpuid:000406e3;pf_mask:0xc0;segment:"Mobile";codename:"Skylake_U";stepping:"D0";pf_model:0xc0)
= 0xf0 iucode_rev(fname:intel-06-4e-03/06-4e-03;cpuid:000406e3;pf_mask:0xc0;segment:"Mobile";codename:"Skylake_Y";stepping:"D0";pf_model:0xc0)
= 0xf0 iucode_rev(fname:intel-06-4e-03/06-4e-03;platform_id:0x40)
= 0xf0 iucode_rev(fname:intel-06-4e-03/06-4e-03;platform_id:0x80)
= 0xd6 iucode_rev(fname:intel/06-4e-03;cpuid:000406e3;pf_mask:0xc0)
= 0xd6 iucode_rev(fname:intel/06-4e-03;cpuid:000406e3;pf_mask:0xc0;segment:"Mobile";codename:"Skylake";stepping:"D0";pf_model:0xc0)
= 0xd6 iucode_rev(fname:intel/06-4e-03;cpuid:000406e3;pf_mask:0xc0;segment:"Mobile";codename:"Skylake";stepping:"K1";pf_model:0xc0)
= 0xd6 iucode_rev(fname:intel/06-4e-03;cpuid:000406e3;pf_mask:0xc0;segment:"Mobile";codename:"Skylake_U_2+3e";stepping:"K1";pf_model:0xc0)
= 0xd6 iucode_rev(fname:intel/06-4e-03;cpuid:000406e3;pf_mask:0xc0;segment:"Mobile";codename:"Skylake_U";stepping:"D0";pf_model:0xc0)
= 0xd6 iucode_rev(fname:intel/06-4e-03;cpuid:000406e3;pf_mask:0xc0;segment:"Mobile";codename:"Skylake_Y";stepping:"D0";pf_model:0xc0)
= 0xd6 iucode_rev(fname:intel/06-4e-03;platform_id:0x40)
= 0xd6 iucode_rev(fname:intel/06-4e-03;platform_id:0x80)
= 0xb000040 iucode_rev(fname:intel-06-4f-01/06-4f-01;cpuid:000406f1;pf_mask:0xef)
= 0xb000040 iucode_rev(fname:intel-06-4f-01/06-4f-01;cpuid:000406f1;pf_mask:0xef;segment:"Desktop";codename:"Broadwell_E";stepping:"B0";pf_model:0xef)
= 0xb000040 iucode_rev(fname:intel-06-4f-01/06-4f-01;cpuid:000406f1;pf_mask:0xef;segment:"Desktop";codename:"Broadwell_E";stepping:"M0";pf_model:0xef)
= 0xb000040 iucode_rev(fname:intel-06-4f-01/06-4f-01;cpuid:000406f1;pf_mask:0xef;segment:"Desktop";codename:"Broadwell_E";stepping:"R0";pf_model:0xef)
= 0xb000040 iucode_rev(fname:intel-06-4f-01/06-4f-01;cpuid:000406f1;pf_mask:0xef;segment:"Desktop";codename:"Broadwell";stepping:"B0";pf_model:0xef)
= 0xb000040 iucode_rev(fname:intel-06-4f-01/06-4f-01;cpuid:000406f1;pf_mask:0xef;segment:"Desktop";codename:"Broadwell";stepping:"M0";pf_model:0xef)
= 0xb000040 iucode_rev(fname:intel-06-4f-01/06-4f-01;cpuid:000406f1;pf_mask:0xef;segment:"Desktop";codename:"Broadwell";stepping:"R0";pf_model:0xef)
= 0xb000040 iucode_rev(fname:intel-06-4f-01/06-4f-01;cpuid:000406f1;pf_mask:0xef;segment:"Server";codename:"Broadwell_EP";stepping:"B0";pf_model:0xef)
= 0xb000040 iucode_rev(fname:intel-06-4f-01/06-4f-01;cpuid:000406f1;pf_mask:0xef;segment:"Server";codename:"Broadwell_EP";stepping:"M0";pf_model:0xef)
= 0xb000040 iucode_rev(fname:intel-06-4f-01/06-4f-01;cpuid:000406f1;pf_mask:0xef;segment:"Server";codename:"Broadwell_EP";stepping:"R0";pf_model:0xef)
= 0xb000040 iucode_rev(fname:intel-06-4f-01/06-4f-01;cpuid:000406f1;pf_mask:0xef;segment:"Server";codename:"Broadwell_EX";stepping:"B0";pf_model:0xef)
= 0xb000040 iucode_rev(fname:intel-06-4f-01/06-4f-01;cpuid:000406f1;pf_mask:0xef;segment:"Server";codename:"Broadwell_EX";stepping:"M0";pf_model:0xef)
= 0xb000040 iucode_rev(fname:intel-06-4f-01/06-4f-01;cpuid:000406f1;pf_mask:0xef;segment:"Server";codename:"Broadwell_EX";stepping:"R0";pf_model:0xef)
= 0xb000040 iucode_rev(fname:intel-06-4f-01/06-4f-01;cpuid:000406f1;pf_mask:0xef;segment:"Server";codename:"Broadwell_ML";stepping:"B0";pf_model:0xef)
= 0xb000040 iucode_rev(fname:intel-06-4f-01/06-4f-01;cpuid:000406f1;pf_mask:0xef;segment:"Server";codename:"Broadwell_ML";stepping:"M0";pf_model:0xef)
= 0xb000040 iucode_rev(fname:intel-06-4f-01/06-4f-01;cpuid:000406f1;pf_mask:0xef;segment:"Server";codename:"Broadwell_ML";stepping:"R0";pf_model:0xef)
= 0xb000040 iucode_rev(fname:intel-06-4f-01/06-4f-01;cpuid:000406f1;pf_mask:0xef;segment:"Server";codename:"Broadwell";stepping:"B0";pf_model:0xef)
= 0xb000040 iucode_rev(fname:intel-06-4f-01/06-4f-01;cpuid:000406f1;pf_mask:0xef;segment:"Server";codename:"Broadwell";stepping:"M0";pf_model:0xef)
= 0xb000040 iucode_rev(fname:intel-06-4f-01/06-4f-01;cpuid:000406f1;pf_mask:0xef;segment:"Server";codename:"Broadwell";stepping:"R0";pf_model:0xef)
= 0xb000040 iucode_rev(fname:intel-06-4f-01/06-4f-01;platform_id:0x1)
= 0xb000040 iucode_rev(fname:intel-06-4f-01/06-4f-01;platform_id:0x20)
= 0xb000040 iucode_rev(fname:intel-06-4f-01/06-4f-01;platform_id:0x2)
= 0xb000040 iucode_rev(fname:intel-06-4f-01/06-4f-01;platform_id:0x40)
= 0xb000040 iucode_rev(fname:intel-06-4f-01/06-4f-01;platform_id:0x4)
= 0xb000040 iucode_rev(fname:intel-06-4f-01/06-4f-01;platform_id:0x80)
= 0xb000040 iucode_rev(fname:intel-06-4f-01/06-4f-01;platform_id:0x8)
= 0x1000161 iucode_rev(fname:intel/06-55-03;cpuid:00050653;pf_mask:0x97)
= 0x1000161 iucode_rev(fname:intel/06-55-03;cpuid:00050653;pf_mask:0x97;segment:"Server";codename:"Skylake_SP";stepping:"B1";pf_model:0x97)
= 0x1000161 iucode_rev(fname:intel/06-55-03;cpuid:00050653;pf_mask:0x97;segment:"Server";codename:"Skylake";stepping:"B1";pf_model:0x97)
= 0x1000161 iucode_rev(fname:intel/06-55-03;platform_id:0x10)
= 0x1000161 iucode_rev(fname:intel/06-55-03;platform_id:0x1)
= 0x1000161 iucode_rev(fname:intel/06-55-03;platform_id:0x2)
= 0x1000161 iucode_rev(fname:intel/06-55-03;platform_id:0x4)
= 0x1000161 iucode_rev(fname:intel/06-55-03;platform_id:0x80)
= 0x2006e05 iucode_rev(fname:intel-06-55-04/06-55-04;cpuid:00050654;pf_mask:0xb7)
= 0x2006e05 iucode_rev(fname:intel-06-55-04/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Desktop";codename:"Skylake";stepping:"H0";pf_model:0xb7)
= 0x2006e05 iucode_rev(fname:intel-06-55-04/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Desktop";codename:"Skylake";stepping:"M0";pf_model:0xb7)
= 0x2006e05 iucode_rev(fname:intel-06-55-04/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Desktop";codename:"Skylake";stepping:"U0";pf_model:0xb7)
= 0x2006e05 iucode_rev(fname:intel-06-55-04/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Desktop";codename:"Skylake_X";stepping:"H0";pf_model:0xb7)
= 0x2006e05 iucode_rev(fname:intel-06-55-04/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Desktop";codename:"Skylake_X";stepping:"M0";pf_model:0xb7)
= 0x2006e05 iucode_rev(fname:intel-06-55-04/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Desktop";codename:"Skylake_X";stepping:"U0";pf_model:0xb7)
= 0x2006e05 iucode_rev(fname:intel-06-55-04/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake_D";stepping:"M1";pf_model:0xb7)
= 0x2006e05 iucode_rev(fname:intel-06-55-04/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake_SP";stepping:"H0";pf_model:0xb7)
= 0x2006e05 iucode_rev(fname:intel-06-55-04/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake_SP";stepping:"M0";pf_model:0xb7)
= 0x2006e05 iucode_rev(fname:intel-06-55-04/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake_SP";stepping:"U0";pf_model:0xb7)
= 0x2006e05 iucode_rev(fname:intel-06-55-04/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake";stepping:"H0";pf_model:0xb7)
= 0x2006e05 iucode_rev(fname:intel-06-55-04/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake";stepping:"M0";pf_model:0xb7)
= 0x2006e05 iucode_rev(fname:intel-06-55-04/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake";stepping:"M1";pf_model:0xb7)
= 0x2006e05 iucode_rev(fname:intel-06-55-04/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake";stepping:"U0";pf_model:0xb7)
= 0x2006e05 iucode_rev(fname:intel-06-55-04/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake_W";stepping:"H0";pf_model:0xb7)
= 0x2006e05 iucode_rev(fname:intel-06-55-04/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake_W";stepping:"M0";pf_model:0xb7)
= 0x2006e05 iucode_rev(fname:intel-06-55-04/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake_W";stepping:"U0";pf_model:0xb7)
= 0x2006e05 iucode_rev(fname:intel-06-55-04/06-55-04;platform_id:0x10)
= 0x2006e05 iucode_rev(fname:intel-06-55-04/06-55-04;platform_id:0x1)
= 0x2006e05 iucode_rev(fname:intel-06-55-04/06-55-04;platform_id:0x20)
= 0x2006e05 iucode_rev(fname:intel-06-55-04/06-55-04;platform_id:0x2)
= 0x2006e05 iucode_rev(fname:intel-06-55-04/06-55-04;platform_id:0x4)
= 0x2006e05 iucode_rev(fname:intel-06-55-04/06-55-04;platform_id:0x80)
= 0x2000064 iucode_rev(fname:intel/06-55-04;cpuid:00050654;pf_mask:0xb7)
= 0x2000064 iucode_rev(fname:intel/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Desktop";codename:"Skylake";stepping:"H0";pf_model:0xb7)
= 0x2000064 iucode_rev(fname:intel/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Desktop";codename:"Skylake";stepping:"M0";pf_model:0xb7)
= 0x2000064 iucode_rev(fname:intel/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Desktop";codename:"Skylake";stepping:"U0";pf_model:0xb7)
= 0x2000064 iucode_rev(fname:intel/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Desktop";codename:"Skylake_X";stepping:"H0";pf_model:0xb7)
= 0x2000064 iucode_rev(fname:intel/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Desktop";codename:"Skylake_X";stepping:"M0";pf_model:0xb7)
= 0x2000064 iucode_rev(fname:intel/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Desktop";codename:"Skylake_X";stepping:"U0";pf_model:0xb7)
= 0x2000064 iucode_rev(fname:intel/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake_D";stepping:"M1";pf_model:0xb7)
= 0x2000064 iucode_rev(fname:intel/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake_SP";stepping:"H0";pf_model:0xb7)
= 0x2000064 iucode_rev(fname:intel/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake_SP";stepping:"M0";pf_model:0xb7)
= 0x2000064 iucode_rev(fname:intel/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake_SP";stepping:"U0";pf_model:0xb7)
= 0x2000064 iucode_rev(fname:intel/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake";stepping:"H0";pf_model:0xb7)
= 0x2000064 iucode_rev(fname:intel/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake";stepping:"M0";pf_model:0xb7)
= 0x2000064 iucode_rev(fname:intel/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake";stepping:"M1";pf_model:0xb7)
= 0x2000064 iucode_rev(fname:intel/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake";stepping:"U0";pf_model:0xb7)
= 0x2000064 iucode_rev(fname:intel/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake_W";stepping:"H0";pf_model:0xb7)
= 0x2000064 iucode_rev(fname:intel/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake_W";stepping:"M0";pf_model:0xb7)
= 0x2000064 iucode_rev(fname:intel/06-55-04;cpuid:00050654;pf_mask:0xb7;segment:"Server";codename:"Skylake_W";stepping:"U0";pf_model:0xb7)
= 0x2000064 iucode_rev(fname:intel/06-55-04;platform_id:0x10)
= 0x2000064 iucode_rev(fname:intel/06-55-04;platform_id:0x1)
= 0x2000064 iucode_rev(fname:intel/06-55-04;platform_id:0x20)
= 0x2000064 iucode_rev(fname:intel/06-55-04;platform_id:0x2)
= 0x2000064 iucode_rev(fname:intel/06-55-04;platform_id:0x4)
= 0x2000064 iucode_rev(fname:intel/06-55-04;platform_id:0x80)
= 0x3000010 iucode_rev(fname:intel/06-55-05;cpuid:00050655;pf_mask:0xb7)
= 0x3000010 iucode_rev(fname:intel/06-55-05;cpuid:00050655;pf_mask:0xb7;segment:"Server";codename:"Cascade_Lake_SP";stepping:"A0";pf_model:0xb7)
= 0x3000010 iucode_rev(fname:intel/06-55-05;cpuid:00050655;pf_mask:0xb7;segment:"Server";codename:"Cascade_Lake";stepping:"A0";pf_model:0xb7)
= 0x3000010 iucode_rev(fname:intel/06-55-05;platform_id:0x10)
= 0x3000010 iucode_rev(fname:intel/06-55-05;platform_id:0x1)
= 0x3000010 iucode_rev(fname:intel/06-55-05;platform_id:0x20)
= 0x3000010 iucode_rev(fname:intel/06-55-05;platform_id:0x2)
= 0x3000010 iucode_rev(fname:intel/06-55-05;platform_id:0x4)
= 0x3000010 iucode_rev(fname:intel/06-55-05;platform_id:0x80)
= 0x4003303 iucode_rev(fname:intel/06-55-06;cpuid:00050656;pf_mask:0xbf)
= 0x4003303 iucode_rev(fname:intel/06-55-06;cpuid:00050656;pf_mask:0xbf;segment:"Server";codename:"Cascade_Lake_SP";stepping:"B0";pf_model:0xbf)
= 0x4003303 iucode_rev(fname:intel/06-55-06;cpuid:00050656;pf_mask:0xbf;segment:"Server";codename:"Cascade_Lake";stepping:"B0";pf_model:0xbf)
= 0x4003303 iucode_rev(fname:intel/06-55-06;platform_id:0x10)
= 0x4003303 iucode_rev(fname:intel/06-55-06;platform_id:0x1)
= 0x4003303 iucode_rev(fname:intel/06-55-06;platform_id:0x20)
= 0x4003303 iucode_rev(fname:intel/06-55-06;platform_id:0x2)
= 0x4003303 iucode_rev(fname:intel/06-55-06;platform_id:0x4)
= 0x4003303 iucode_rev(fname:intel/06-55-06;platform_id:0x80)
= 0x4003303 iucode_rev(fname:intel/06-55-06;platform_id:0x8)
= 0x5003303 iucode_rev(fname:intel/06-55-07;cpuid:00050657;pf_mask:0xbf)
= 0x5003303 iucode_rev(fname:intel/06-55-07;cpuid:00050657;pf_mask:0xbf;segment:"Desktop";codename:"Cascade_Lake";stepping:"B1";pf_model:0xbf)
= 0x5003303 iucode_rev(fname:intel/06-55-07;cpuid:00050657;pf_mask:0xbf;segment:"Desktop";codename:"Cascade_Lake";stepping:"L1";pf_model:0xbf)
= 0x5003303 iucode_rev(fname:intel/06-55-07;cpuid:00050657;pf_mask:0xbf;segment:"Desktop";codename:"Cascade_Lake_X";stepping:"B1";pf_model:0xbf)
= 0x5003303 iucode_rev(fname:intel/06-55-07;cpuid:00050657;pf_mask:0xbf;segment:"Desktop";codename:"Cascade_Lake_X";stepping:"L1";pf_model:0xbf)
= 0x5003303 iucode_rev(fname:intel/06-55-07;cpuid:00050657;pf_mask:0xbf;segment:"Server";codename:"Cascade_Lake_SP";stepping:"B1";pf_model:0xbf)
= 0x5003303 iucode_rev(fname:intel/06-55-07;cpuid:00050657;pf_mask:0xbf;segment:"Server";codename:"Cascade_Lake_SP";stepping:"L1";pf_model:0xbf)
= 0x5003303 iucode_rev(fname:intel/06-55-07;cpuid:00050657;pf_mask:0xbf;segment:"Server";codename:"Cascade_Lake";stepping:"B1";pf_model:0xbf)
= 0x5003303 iucode_rev(fname:intel/06-55-07;cpuid:00050657;pf_mask:0xbf;segment:"Server";codename:"Cascade_Lake";stepping:"L1";pf_model:0xbf)
= 0x5003303 iucode_rev(fname:intel/06-55-07;cpuid:00050657;pf_mask:0xbf;segment:"Server";codename:"Cascade_Lake_W";stepping:"B1";pf_model:0xbf)
= 0x5003303 iucode_rev(fname:intel/06-55-07;cpuid:00050657;pf_mask:0xbf;segment:"Server";codename:"Cascade_Lake_W";stepping:"L1";pf_model:0xbf)
= 0x5003303 iucode_rev(fname:intel/06-55-07;platform_id:0x10)
= 0x5003303 iucode_rev(fname:intel/06-55-07;platform_id:0x1)
= 0x5003303 iucode_rev(fname:intel/06-55-07;platform_id:0x20)
= 0x5003303 iucode_rev(fname:intel/06-55-07;platform_id:0x2)
= 0x5003303 iucode_rev(fname:intel/06-55-07;platform_id:0x4)
= 0x5003303 iucode_rev(fname:intel/06-55-07;platform_id:0x80)
= 0x5003303 iucode_rev(fname:intel/06-55-07;platform_id:0x8)
= 0x7002503 iucode_rev(fname:intel/06-55-0b;cpuid:0005065b;pf_mask:0xbf)
= 0x7002503 iucode_rev(fname:intel/06-55-0b;cpuid:0005065b;pf_mask:0xbf;segment:"Server";codename:"Cooper_Lake_SP";stepping:"A1";pf_model:0xbf)
= 0x7002503 iucode_rev(fname:intel/06-55-0b;cpuid:0005065b;pf_mask:0xbf;segment:"Server";codename:"Cooper_Lake";stepping:"A1";pf_model:0xbf)
= 0x7002503 iucode_rev(fname:intel/06-55-0b;platform_id:0x10)
= 0x7002503 iucode_rev(fname:intel/06-55-0b;platform_id:0x1)
= 0x7002503 iucode_rev(fname:intel/06-55-0b;platform_id:0x20)
= 0x7002503 iucode_rev(fname:intel/06-55-0b;platform_id:0x2)
= 0x7002503 iucode_rev(fname:intel/06-55-0b;platform_id:0x4)
= 0x7002503 iucode_rev(fname:intel/06-55-0b;platform_id:0x80)
= 0x7002503 iucode_rev(fname:intel/06-55-0b;platform_id:0x8)
= 0x1c iucode_rev(fname:intel/06-56-02;cpuid:00050662;pf_mask:0x10)
= 0x1c iucode_rev(fname:intel/06-56-02;cpuid:00050662;pf_mask:0x10;segment:"Server";codename:"Broadwell_DE";stepping:"V1";pf_model:0x10)
= 0x1c iucode_rev(fname:intel/06-56-02;cpuid:00050662;pf_mask:0x10;segment:"Server";codename:"Broadwell";stepping:"V1";pf_model:0x10)
= 0x1c iucode_rev(fname:intel/06-56-02;platform_id:0x10)
= 0x700001c iucode_rev(fname:intel/06-56-03;cpuid:00050663;pf_mask:0x10)
= 0x700001c iucode_rev(fname:intel/06-56-03;cpuid:00050663;pf_mask:0x10;segment:"Server";codename:"Broadwell_DE";stepping:"V2";pf_model:0x10)
= 0x700001c iucode_rev(fname:intel/06-56-03;cpuid:00050663;pf_mask:0x10;segment:"Server";codename:"Broadwell_DE";stepping:"V3";pf_model:0x10)
= 0x700001c iucode_rev(fname:intel/06-56-03;cpuid:00050663;pf_mask:0x10;segment:"Server";codename:"Broadwell";stepping:"V2";pf_model:0x10)
= 0x700001c iucode_rev(fname:intel/06-56-03;cpuid:00050663;pf_mask:0x10;segment:"Server";codename:"Broadwell";stepping:"V3";pf_model:0x10)
= 0x700001c iucode_rev(fname:intel/06-56-03;platform_id:0x10)
= 0xf00001a iucode_rev(fname:intel/06-56-04;cpuid:00050664;pf_mask:0x10)
= 0xf00001a iucode_rev(fname:intel/06-56-04;cpuid:00050664;pf_mask:0x10;segment:"Server";codename:"Broadwell_DE";stepping:"Y0";pf_model:0x10)
= 0xf00001a iucode_rev(fname:intel/06-56-04;cpuid:00050664;pf_mask:0x10;segment:"Server";codename:"Broadwell";stepping:"Y0";pf_model:0x10)
= 0xf00001a iucode_rev(fname:intel/06-56-04;platform_id:0x10)
= 0xe000014 iucode_rev(fname:intel/06-56-05;cpuid:00050665;pf_mask:0x10)
= 0xe000014 iucode_rev(fname:intel/06-56-05;cpuid:00050665;pf_mask:0x10;segment:"Server";codename:"Broadwell_NS";stepping:"A0";pf_model:0x10)
= 0xe000014 iucode_rev(fname:intel/06-56-05;cpuid:00050665;pf_mask:0x10;segment:"Server";codename:"Broadwell_NS";stepping:"A1";pf_model:0x10)
= 0xe000014 iucode_rev(fname:intel/06-56-05;cpuid:00050665;pf_mask:0x10;segment:"Server";codename:"Broadwell";stepping:"A0";pf_model:0x10)
= 0xe000014 iucode_rev(fname:intel/06-56-05;cpuid:00050665;pf_mask:0x10;segment:"Server";codename:"Broadwell";stepping:"A1";pf_model:0x10)
= 0xe000014 iucode_rev(fname:intel/06-56-05;cpuid:00050665;pf_mask:0x10;segment:"Server";codename:"Hewitt_Lake_[Broadwell]";stepping:"A1";pf_model:0x10)
= 0xe000014 iucode_rev(fname:intel/06-56-05;platform_id:0x10)
= 0x14 iucode_rev(fname:intel/06-5c-02;cpuid:000506c2;pf_mask:0x1)
= 0x14 iucode_rev(fname:intel/06-5c-02;cpuid:000506c2;pf_mask:0x1;segment:"SOC";codename:"Broxton";stepping:"C0";pf_model:0x1)
= 0x14 iucode_rev(fname:intel/06-5c-02;platform_id:0x1)
= 0x48 iucode_rev(fname:intel/06-5c-09;cpuid:000506c9;pf_mask:0x3)
= 0x48 iucode_rev(fname:intel/06-5c-09;cpuid:000506c9;pf_mask:0x3;segment:"SOC";codename:"Apollo_Lake";stepping:"D0";pf_model:0x3)
= 0x48 iucode_rev(fname:intel/06-5c-09;platform_id:0x1)
= 0x48 iucode_rev(fname:intel/06-5c-09;platform_id:0x2)
= 0x28 iucode_rev(fname:intel/06-5c-0a;cpuid:000506ca;pf_mask:0x3)
= 0x28 iucode_rev(fname:intel/06-5c-0a;cpuid:000506ca;pf_mask:0x3;segment:"SOC";codename:"Apollo_Lake";stepping:"B1";pf_model:0x3)
= 0x28 iucode_rev(fname:intel/06-5c-0a;cpuid:000506ca;pf_mask:0x3;segment:"SOC";codename:"Apollo_Lake";stepping:"F1";pf_model:0x3)
= 0x28 iucode_rev(fname:intel/06-5c-0a;platform_id:0x1)
= 0x28 iucode_rev(fname:intel/06-5c-0a;platform_id:0x2)
= 0xf0 iucode_rev(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36)
= 0xf0 iucode_rev(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Desktop";codename:"Skylake_S";stepping:"N0";pf_model:0x36)
= 0xf0 iucode_rev(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Desktop";codename:"Skylake_S";stepping:"R0";pf_model:0x36)
= 0xf0 iucode_rev(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Desktop";codename:"Skylake_S";stepping:"S0";pf_model:0x36)
= 0xf0 iucode_rev(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Desktop";codename:"Skylake";stepping:"N0";pf_model:0x36)
= 0xf0 iucode_rev(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Desktop";codename:"Skylake";stepping:"R0";pf_model:0x36)
= 0xf0 iucode_rev(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Desktop";codename:"Skylake";stepping:"S0";pf_model:0x36)
= 0xf0 iucode_rev(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Mobile";codename:"Skylake_H";stepping:"N0";pf_model:0x36)
= 0xf0 iucode_rev(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Mobile";codename:"Skylake_H";stepping:"R0";pf_model:0x36)
= 0xf0 iucode_rev(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Mobile";codename:"Skylake_H";stepping:"S0";pf_model:0x36)
= 0xf0 iucode_rev(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Mobile";codename:"Skylake";stepping:"N0";pf_model:0x36)
= 0xf0 iucode_rev(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Mobile";codename:"Skylake";stepping:"R0";pf_model:0x36)
= 0xf0 iucode_rev(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Mobile";codename:"Skylake";stepping:"S0";pf_model:0x36)
= 0xf0 iucode_rev(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Server";codename:"Skylake";stepping:"N0";pf_model:0x36)
= 0xf0 iucode_rev(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Server";codename:"Skylake";stepping:"R0";pf_model:0x36)
= 0xf0 iucode_rev(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Server";codename:"Skylake";stepping:"S0";pf_model:0x36)
= 0xf0 iucode_rev(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Server";codename:"Skylake_Xeon_E3";stepping:"N0";pf_model:0x36)
= 0xf0 iucode_rev(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Server";codename:"Skylake_Xeon_E3";stepping:"R0";pf_model:0x36)
= 0xf0 iucode_rev(fname:intel-06-5e-03/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Server";codename:"Skylake_Xeon_E3";stepping:"S0";pf_model:0x36)
= 0xf0 iucode_rev(fname:intel-06-5e-03/06-5e-03;platform_id:0x10)
= 0xf0 iucode_rev(fname:intel-06-5e-03/06-5e-03;platform_id:0x20)
= 0xf0 iucode_rev(fname:intel-06-5e-03/06-5e-03;platform_id:0x2)
= 0xf0 iucode_rev(fname:intel-06-5e-03/06-5e-03;platform_id:0x4)
= 0xd6 iucode_rev(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36)
= 0xd6 iucode_rev(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Desktop";codename:"Skylake_S";stepping:"N0";pf_model:0x36)
= 0xd6 iucode_rev(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Desktop";codename:"Skylake_S";stepping:"R0";pf_model:0x36)
= 0xd6 iucode_rev(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Desktop";codename:"Skylake_S";stepping:"S0";pf_model:0x36)
= 0xd6 iucode_rev(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Desktop";codename:"Skylake";stepping:"N0";pf_model:0x36)
= 0xd6 iucode_rev(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Desktop";codename:"Skylake";stepping:"R0";pf_model:0x36)
= 0xd6 iucode_rev(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Desktop";codename:"Skylake";stepping:"S0";pf_model:0x36)
= 0xd6 iucode_rev(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Mobile";codename:"Skylake_H";stepping:"N0";pf_model:0x36)
= 0xd6 iucode_rev(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Mobile";codename:"Skylake_H";stepping:"R0";pf_model:0x36)
= 0xd6 iucode_rev(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Mobile";codename:"Skylake_H";stepping:"S0";pf_model:0x36)
= 0xd6 iucode_rev(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Mobile";codename:"Skylake";stepping:"N0";pf_model:0x36)
= 0xd6 iucode_rev(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Mobile";codename:"Skylake";stepping:"R0";pf_model:0x36)
= 0xd6 iucode_rev(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Mobile";codename:"Skylake";stepping:"S0";pf_model:0x36)
= 0xd6 iucode_rev(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Server";codename:"Skylake";stepping:"N0";pf_model:0x36)
= 0xd6 iucode_rev(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Server";codename:"Skylake";stepping:"R0";pf_model:0x36)
= 0xd6 iucode_rev(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Server";codename:"Skylake";stepping:"S0";pf_model:0x36)
= 0xd6 iucode_rev(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Server";codename:"Skylake_Xeon_E3";stepping:"N0";pf_model:0x36)
= 0xd6 iucode_rev(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Server";codename:"Skylake_Xeon_E3";stepping:"R0";pf_model:0x36)
= 0xd6 iucode_rev(fname:intel/06-5e-03;cpuid:000506e3;pf_mask:0x36;segment:"Server";codename:"Skylake_Xeon_E3";stepping:"S0";pf_model:0x36)
= 0xd6 iucode_rev(fname:intel/06-5e-03;platform_id:0x10)
= 0xd6 iucode_rev(fname:intel/06-5e-03;platform_id:0x20)
= 0xd6 iucode_rev(fname:intel/06-5e-03;platform_id:0x2)
= 0xd6 iucode_rev(fname:intel/06-5e-03;platform_id:0x4)
= 0x38 iucode_rev(fname:intel/06-5f-01;cpuid:000506f1;pf_mask:0x1)
= 0x38 iucode_rev(fname:intel/06-5f-01;cpuid:000506f1;pf_mask:0x1;segment:"SOC";codename:"Denverton";stepping:"B0";pf_model:0x1)
= 0x38 iucode_rev(fname:intel/06-5f-01;platform_id:0x1)
= 0x2a iucode_rev(fname:intel/06-66-03;cpuid:00060663;pf_mask:0x80)
= 0x2a iucode_rev(fname:intel/06-66-03;cpuid:00060663;pf_mask:0x80;segment:"Mobile";codename:"Cannon_Lake";stepping:"D0";pf_model:0x80)
= 0x2a iucode_rev(fname:intel/06-66-03;cpuid:00060663;pf_mask:0x80;segment:"Mobile";codename:"Cannon_Lake_U";stepping:"D0";pf_model:0x80)
= 0x2a iucode_rev(fname:intel/06-66-03;platform_id:0x80)
= 0xc0002f0 iucode_rev(fname:intel/06-6a-05;cpuid:000606a5;pf_mask:0x87)
= 0xc0002f0 iucode_rev(fname:intel/06-6a-05;cpuid:000606a5;pf_mask:0x87;segment:"Server";codename:"Ice_Lake_SP";stepping:"C0";pf_model:0x87)
= 0xc0002f0 iucode_rev(fname:intel/06-6a-05;cpuid:000606a5;pf_mask:0x87;segment:"Server";codename:"Ice_Lake";stepping:"C0";pf_model:0x87)
= 0xc0002f0 iucode_rev(fname:intel/06-6a-05;platform_id:0x1)
= 0xc0002f0 iucode_rev(fname:intel/06-6a-05;platform_id:0x2)
= 0xc0002f0 iucode_rev(fname:intel/06-6a-05;platform_id:0x4)
= 0xc0002f0 iucode_rev(fname:intel/06-6a-05;platform_id:0x80)
= 0xd000389 iucode_rev(fname:intel/06-6a-06;cpuid:000606a6;pf_mask:0x87)
= 0xd000389 iucode_rev(fname:intel/06-6a-06;cpuid:000606a6;pf_mask:0x87;segment:"Server";codename:"Ice_Lake_SP";stepping:"D0";pf_model:0x87)
= 0xd000389 iucode_rev(fname:intel/06-6a-06;cpuid:000606a6;pf_mask:0x87;segment:"Server";codename:"Ice_Lake";stepping:"D0";pf_model:0x87)
= 0xd000389 iucode_rev(fname:intel/06-6a-06;platform_id:0x1)
= 0xd000389 iucode_rev(fname:intel/06-6a-06;platform_id:0x2)
= 0xd000389 iucode_rev(fname:intel/06-6a-06;platform_id:0x4)
= 0xd000389 iucode_rev(fname:intel/06-6a-06;platform_id:0x80)
= 0x1000211 iucode_rev(fname:intel/06-6c-01;cpuid:000606c1;pf_mask:0x10)
= 0x1000211 iucode_rev(fname:intel/06-6c-01;cpuid:000606c1;pf_mask:0x10;segment:"Server";codename:"Ice_Lake_D";stepping:"B0";pf_model:0x10)
= 0x1000211 iucode_rev(fname:intel/06-6c-01;cpuid:000606c1;pf_mask:0x10;segment:"Server";codename:"Ice_Lake";stepping:"B0";pf_model:0x10)
= 0x1000211 iucode_rev(fname:intel/06-6c-01;platform_id:0x10)
= 0x3e iucode_rev(fname:intel/06-7a-01;cpuid:000706a1;pf_mask:0x1)
= 0x3e iucode_rev(fname:intel/06-7a-01;cpuid:000706a1;pf_mask:0x1;segment:"SOC";codename:"Gemini_Lake";stepping:"B0";pf_model:0x1)
= 0x3e iucode_rev(fname:intel/06-7a-01;platform_id:0x1)
= 0x22 iucode_rev(fname:intel/06-7a-08;cpuid:000706a8;pf_mask:0x1)
= 0x22 iucode_rev(fname:intel/06-7a-08;cpuid:000706a8;pf_mask:0x1;segment:"SOC";codename:"Gemini_Lake_R";stepping:"R0";pf_model:0x1)
= 0x22 iucode_rev(fname:intel/06-7a-08;cpuid:000706a8;pf_mask:0x1;segment:"SOC";codename:"Gemini_Lake";stepping:"R0";pf_model:0x1)
= 0x22 iucode_rev(fname:intel/06-7a-08;platform_id:0x1)
= 0xb8 iucode_rev(fname:intel/06-7e-05;cpuid:000706e5;pf_mask:0x80)
= 0xb8 iucode_rev(fname:intel/06-7e-05;cpuid:000706e5;pf_mask:0x80;segment:"Mobile";codename:"Ice_Lake";stepping:"D1";pf_model:0x80)
= 0xb8 iucode_rev(fname:intel/06-7e-05;cpuid:000706e5;pf_mask:0x80;segment:"Mobile";codename:"Ice_Lake_U";stepping:"D1";pf_model:0x80)
= 0xb8 iucode_rev(fname:intel/06-7e-05;cpuid:000706e5;pf_mask:0x80;segment:"Mobile";codename:"Ice_Lake_Y";stepping:"D1";pf_model:0x80)
= 0xb8 iucode_rev(fname:intel/06-7e-05;platform_id:0x80)
= 0x32 iucode_rev(fname:intel/06-8a-01;cpuid:000806a1;pf_mask:0x10)
= 0x32 iucode_rev(fname:intel/06-8a-01;cpuid:000806a1;pf_mask:0x10;segment:"SOC";codename:"Lakefield";stepping:"B2";pf_model:0x10)
= 0x32 iucode_rev(fname:intel/06-8a-01;cpuid:000806a1;pf_mask:0x10;segment:"SOC";codename:"Lakefield";stepping:"B3";pf_model:0x10)
= 0x32 iucode_rev(fname:intel/06-8a-01;platform_id:0x10)
= 0xa6 iucode_rev(fname:intel-06-8c-01/06-8c-01;cpuid:000806c1;pf_mask:0x80)
= 0xa6 iucode_rev(fname:intel-06-8c-01/06-8c-01;cpuid:000806c1;pf_mask:0x80;segment:"Mobile";codename:"Tiger_Lake";stepping:"B1";pf_model:0x80)
= 0xa6 iucode_rev(fname:intel-06-8c-01/06-8c-01;cpuid:000806c1;pf_mask:0x80;segment:"Mobile";codename:"Tiger_Lake_UP3";stepping:"B1";pf_model:0x80)
= 0xa6 iucode_rev(fname:intel-06-8c-01/06-8c-01;cpuid:000806c1;pf_mask:0x80;segment:"Mobile";codename:"Tiger_Lake_UP4";stepping:"B1";pf_model:0x80)
= 0xa6 iucode_rev(fname:intel-06-8c-01/06-8c-01;platform_id:0x80)
= 0x28 iucode_rev(fname:intel/06-8c-02;cpuid:000806c2;pf_mask:0xc2)
= 0x28 iucode_rev(fname:intel/06-8c-02;cpuid:000806c2;pf_mask:0xc2;segment:"Mobile";codename:"Tiger_Lake_Refresh_R";stepping:"C0";pf_model:0x80)
= 0x28 iucode_rev(fname:intel/06-8c-02;cpuid:000806c2;pf_mask:0xc2;segment:"Mobile";codename:"Tiger_Lake_Refresh";stepping:"C0";pf_model:0x80)
= 0x28 iucode_rev(fname:intel/06-8c-02;platform_id:0x2)
= 0x28 iucode_rev(fname:intel/06-8c-02;platform_id:0x40)
= 0x28 iucode_rev(fname:intel/06-8c-02;platform_id:0x80)
= 0x42 iucode_rev(fname:intel/06-8d-01;cpuid:000806d1;pf_mask:0xc2)
= 0x42 iucode_rev(fname:intel/06-8d-01;cpuid:000806d1;pf_mask:0xc2;segment:"Mobile";codename:"Tiger_Lake_H";stepping:"R0";pf_model:0xc2)
= 0x42 iucode_rev(fname:intel/06-8d-01;cpuid:000806d1;pf_mask:0xc2;segment:"Mobile";codename:"Tiger_Lake";stepping:"R0";pf_model:0xc2)
= 0x42 iucode_rev(fname:intel/06-8d-01;platform_id:0x2)
= 0x42 iucode_rev(fname:intel/06-8d-01;platform_id:0x40)
= 0x42 iucode_rev(fname:intel/06-8d-01;platform_id:0x80)
= 0xf0 iucode_rev(fname:intel/06-8e-09;cpuid:000806e9;pf_mask:0x10)
= 0xf0 iucode_rev(fname:intel/06-8e-09;cpuid:000806e9;pf_mask:0x10;segment:"Mobile";codename:"Amber_Lake";stepping:"H0";pf_model:0x10)
= 0xf0 iucode_rev(fname:intel/06-8e-09;cpuid:000806e9;pf_mask:0x10;segment:"Mobile";codename:"Amber_Lake_Y_2+2";stepping:"H0";pf_model:0x10)
= 0xf0 iucode_rev(fname:intel/06-8e-09;cpuid:000806e9;pf_mask:0xc0)
= 0xf0 iucode_rev(fname:intel/06-8e-09;cpuid:000806e9;pf_mask:0xc0;segment:"Mobile";codename:"Kaby_Lake";stepping:"H0";pf_model:0xc0)
= 0xf0 iucode_rev(fname:intel/06-8e-09;cpuid:000806e9;pf_mask:0xc0;segment:"Mobile";codename:"Kaby_Lake";stepping:"J1";pf_model:0xc0)
= 0xf0 iucode_rev(fname:intel/06-8e-09;cpuid:000806e9;pf_mask:0xc0;segment:"Mobile";codename:"Kaby_Lake_U_2+3e";stepping:"J1";pf_model:0xc0)
= 0xf0 iucode_rev(fname:intel/06-8e-09;cpuid:000806e9;pf_mask:0xc0;segment:"Mobile";codename:"Kaby_Lake_U";stepping:"H0";pf_model:0xc0)
= 0xf0 iucode_rev(fname:intel/06-8e-09;cpuid:000806e9;pf_mask:0xc0;segment:"Mobile";codename:"Kaby_Lake_Y";stepping:"H0";pf_model:0xc0)
= 0xf0 iucode_rev(fname:intel/06-8e-09;platform_id:0x10)
= 0xf0 iucode_rev(fname:intel/06-8e-09;platform_id:0x40)
= 0xf0 iucode_rev(fname:intel/06-8e-09;platform_id:0x80)
= 0xf0 iucode_rev(fname:intel/06-8e-0a;cpuid:000806ea;pf_mask:0xc0)
= 0xf0 iucode_rev(fname:intel/06-8e-0a;cpuid:000806ea;pf_mask:0xc0;segment:"Mobile";codename:"Coffee_Lake";stepping:"D0";pf_model:0xc0)
= 0xf0 iucode_rev(fname:intel/06-8e-0a;cpuid:000806ea;pf_mask:0xc0;segment:"Mobile";codename:"Coffee_Lake_U_4+3e";stepping:"D0";pf_model:0xc0)
= 0xf0 iucode_rev(fname:intel/06-8e-0a;cpuid:000806ea;pf_mask:0xc0;segment:"Mobile";codename:"Kaby_Lake_R";stepping:"Y0";pf_model:0xc0)
= 0xf0 iucode_rev(fname:intel/06-8e-0a;cpuid:000806ea;pf_mask:0xc0;segment:"Mobile";codename:"Kaby_Lake";stepping:"Y0";pf_model:0xc0)
= 0xf0 iucode_rev(fname:intel/06-8e-0a;platform_id:0x40)
= 0xf0 iucode_rev(fname:intel/06-8e-0a;platform_id:0x80)
= 0xf0 iucode_rev(fname:intel/06-8e-0b;cpuid:000806eb;pf_mask:0xd0)
= 0xf0 iucode_rev(fname:intel/06-8e-0b;cpuid:000806eb;pf_mask:0xd0;segment:"Mobile";codename:"Whiskey_Lake";stepping:"W0";pf_model:0xd0)
= 0xf0 iucode_rev(fname:intel/06-8e-0b;cpuid:000806eb;pf_mask:0xd0;segment:"Mobile";codename:"Whiskey_Lake_U";stepping:"W0";pf_model:0xd0)
= 0xf0 iucode_rev(fname:intel/06-8e-0b;platform_id:0x10)
= 0xf0 iucode_rev(fname:intel/06-8e-0b;platform_id:0x40)
= 0xf0 iucode_rev(fname:intel/06-8e-0b;platform_id:0x80)
= 0xf4 iucode_rev(fname:intel/06-8e-0c;cpuid:000806ec;pf_mask:0x94)
= 0xf4 iucode_rev(fname:intel/06-8e-0c;cpuid:000806ec;pf_mask:0x94;segment:"Mobile";codename:"Amber_Lake";stepping:"V0";pf_model:0x94)
= 0xf4 iucode_rev(fname:intel/06-8e-0c;cpuid:000806ec;pf_mask:0x94;segment:"Mobile";codename:"Amber_Lake_Y_4+2";stepping:"V0";pf_model:0x94)
= 0xf4 iucode_rev(fname:intel/06-8e-0c;cpuid:000806ec;pf_mask:0x94;segment:"Mobile";codename:"Comet_Lake";stepping:"V0";pf_model:0x94)
= 0xf4 iucode_rev(fname:intel/06-8e-0c;cpuid:000806ec;pf_mask:0x94;segment:"Mobile";codename:"Comet_Lake_U_4+2";stepping:"V0";pf_model:0x94)
= 0xf4 iucode_rev(fname:intel/06-8e-0c;cpuid:000806ec;pf_mask:0x94;segment:"Mobile";codename:"Whiskey_Lake";stepping:"V0";pf_model:0x94)
= 0xf4 iucode_rev(fname:intel/06-8e-0c;cpuid:000806ec;pf_mask:0x94;segment:"Mobile";codename:"Whiskey_Lake_U";stepping:"V0";pf_model:0x94)
= 0xf4 iucode_rev(fname:intel/06-8e-0c;platform_id:0x10)
= 0xf4 iucode_rev(fname:intel/06-8e-0c;platform_id:0x4)
= 0xf4 iucode_rev(fname:intel/06-8e-0c;platform_id:0x80)
= 0x2c000170 iucode_rev(fname:intel/06-8f-04;cpuid:000806f4;pf_mask:0x10)
= 0x2b000181 iucode_rev(fname:intel/06-8f-04;cpuid:000806f4;pf_mask:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-04;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E0";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-04;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S1";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-04;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E0";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-04;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S1";pf_model:0x87)
= 0x2c000170 iucode_rev(fname:intel/06-8f-04;cpuid:000806f5;pf_mask:0x10)
= 0x2c000170 iucode_rev(fname:intel/06-8f-04;cpuid:000806f5;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids_HBM";stepping:"B1";pf_model:0x10)
= 0x2c000170 iucode_rev(fname:intel/06-8f-04;cpuid:000806f5;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids";stepping:"B1";pf_model:0x10)
= 0x2b000181 iucode_rev(fname:intel/06-8f-04;cpuid:000806f5;pf_mask:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-04;cpuid:000806f5;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E2";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-04;cpuid:000806f5;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E2";pf_model:0x87)
= 0x2c000170 iucode_rev(fname:intel/06-8f-04;cpuid:000806f6;pf_mask:0x10)
= 0x2b000181 iucode_rev(fname:intel/06-8f-04;cpuid:000806f6;pf_mask:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-04;cpuid:000806f6;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E3";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-04;cpuid:000806f6;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E3";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-04;cpuid:000806f7;pf_mask:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-04;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E4";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-04;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S2";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-04;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E4";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-04;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S2";pf_model:0x87)
= 0x2c000170 iucode_rev(fname:intel/06-8f-04;cpuid:000806f8;pf_mask:0x10)
= 0x2c000170 iucode_rev(fname:intel/06-8f-04;cpuid:000806f8;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids_HBM";stepping:"B3";pf_model:0x10)
= 0x2c000170 iucode_rev(fname:intel/06-8f-04;cpuid:000806f8;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids";stepping:"B3";pf_model:0x10)
= 0x2b000181 iucode_rev(fname:intel/06-8f-04;cpuid:000806f8;pf_mask:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-04;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E5";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-04;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S3";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-04;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E5";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-04;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S3";pf_model:0x87)
= 0x2c000170 iucode_rev(fname:intel/06-8f-04;platform_id:0x10)
= 0x2b000181 iucode_rev(fname:intel/06-8f-04;platform_id:0x1)
= 0x2b000181 iucode_rev(fname:intel/06-8f-04;platform_id:0x2)
= 0x2b000181 iucode_rev(fname:intel/06-8f-04;platform_id:0x4)
= 0x2b000181 iucode_rev(fname:intel/06-8f-04;platform_id:0x80)
= 0x2c000170 iucode_rev(fname:intel/06-8f-05;cpuid:000806f4;pf_mask:0x10)
= 0x2b000181 iucode_rev(fname:intel/06-8f-05;cpuid:000806f4;pf_mask:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-05;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E0";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-05;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S1";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-05;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E0";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-05;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S1";pf_model:0x87)
= 0x2c000170 iucode_rev(fname:intel/06-8f-05;cpuid:000806f5;pf_mask:0x10)
= 0x2c000170 iucode_rev(fname:intel/06-8f-05;cpuid:000806f5;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids_HBM";stepping:"B1";pf_model:0x10)
= 0x2c000170 iucode_rev(fname:intel/06-8f-05;cpuid:000806f5;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids";stepping:"B1";pf_model:0x10)
= 0x2b000181 iucode_rev(fname:intel/06-8f-05;cpuid:000806f5;pf_mask:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-05;cpuid:000806f5;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E2";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-05;cpuid:000806f5;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E2";pf_model:0x87)
= 0x2c000170 iucode_rev(fname:intel/06-8f-05;cpuid:000806f6;pf_mask:0x10)
= 0x2b000181 iucode_rev(fname:intel/06-8f-05;cpuid:000806f6;pf_mask:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-05;cpuid:000806f6;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E3";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-05;cpuid:000806f6;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E3";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-05;cpuid:000806f7;pf_mask:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-05;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E4";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-05;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S2";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-05;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E4";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-05;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S2";pf_model:0x87)
= 0x2c000170 iucode_rev(fname:intel/06-8f-05;cpuid:000806f8;pf_mask:0x10)
= 0x2c000170 iucode_rev(fname:intel/06-8f-05;cpuid:000806f8;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids_HBM";stepping:"B3";pf_model:0x10)
= 0x2c000170 iucode_rev(fname:intel/06-8f-05;cpuid:000806f8;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids";stepping:"B3";pf_model:0x10)
= 0x2b000181 iucode_rev(fname:intel/06-8f-05;cpuid:000806f8;pf_mask:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-05;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E5";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-05;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S3";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-05;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E5";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-05;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S3";pf_model:0x87)
= 0x2c000170 iucode_rev(fname:intel/06-8f-05;platform_id:0x10)
= 0x2b000181 iucode_rev(fname:intel/06-8f-05;platform_id:0x1)
= 0x2b000181 iucode_rev(fname:intel/06-8f-05;platform_id:0x2)
= 0x2b000181 iucode_rev(fname:intel/06-8f-05;platform_id:0x4)
= 0x2b000181 iucode_rev(fname:intel/06-8f-05;platform_id:0x80)
= 0x2c000170 iucode_rev(fname:intel/06-8f-06;cpuid:000806f4;pf_mask:0x10)
= 0x2b000181 iucode_rev(fname:intel/06-8f-06;cpuid:000806f4;pf_mask:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-06;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E0";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-06;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S1";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-06;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E0";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-06;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S1";pf_model:0x87)
= 0x2c000170 iucode_rev(fname:intel/06-8f-06;cpuid:000806f5;pf_mask:0x10)
= 0x2c000170 iucode_rev(fname:intel/06-8f-06;cpuid:000806f5;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids_HBM";stepping:"B1";pf_model:0x10)
= 0x2c000170 iucode_rev(fname:intel/06-8f-06;cpuid:000806f5;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids";stepping:"B1";pf_model:0x10)
= 0x2b000181 iucode_rev(fname:intel/06-8f-06;cpuid:000806f5;pf_mask:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-06;cpuid:000806f5;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E2";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-06;cpuid:000806f5;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E2";pf_model:0x87)
= 0x2c000170 iucode_rev(fname:intel/06-8f-06;cpuid:000806f6;pf_mask:0x10)
= 0x2b000181 iucode_rev(fname:intel/06-8f-06;cpuid:000806f6;pf_mask:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-06;cpuid:000806f6;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E3";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-06;cpuid:000806f6;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E3";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-06;cpuid:000806f7;pf_mask:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-06;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E4";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-06;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S2";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-06;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E4";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-06;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S2";pf_model:0x87)
= 0x2c000170 iucode_rev(fname:intel/06-8f-06;cpuid:000806f8;pf_mask:0x10)
= 0x2c000170 iucode_rev(fname:intel/06-8f-06;cpuid:000806f8;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids_HBM";stepping:"B3";pf_model:0x10)
= 0x2c000170 iucode_rev(fname:intel/06-8f-06;cpuid:000806f8;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids";stepping:"B3";pf_model:0x10)
= 0x2b000181 iucode_rev(fname:intel/06-8f-06;cpuid:000806f8;pf_mask:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-06;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E5";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-06;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S3";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-06;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E5";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-06;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S3";pf_model:0x87)
= 0x2c000170 iucode_rev(fname:intel/06-8f-06;platform_id:0x10)
= 0x2b000181 iucode_rev(fname:intel/06-8f-06;platform_id:0x1)
= 0x2b000181 iucode_rev(fname:intel/06-8f-06;platform_id:0x2)
= 0x2b000181 iucode_rev(fname:intel/06-8f-06;platform_id:0x4)
= 0x2b000181 iucode_rev(fname:intel/06-8f-06;platform_id:0x80)
= 0x2b000181 iucode_rev(fname:intel/06-8f-07;cpuid:000806f4;pf_mask:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-07;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E0";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-07;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S1";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-07;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E0";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-07;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S1";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-07;cpuid:000806f5;pf_mask:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-07;cpuid:000806f5;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E2";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-07;cpuid:000806f5;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E2";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-07;cpuid:000806f6;pf_mask:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-07;cpuid:000806f6;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E3";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-07;cpuid:000806f6;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E3";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-07;cpuid:000806f7;pf_mask:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-07;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E4";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-07;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S2";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-07;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E4";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-07;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S2";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-07;cpuid:000806f8;pf_mask:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-07;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E5";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-07;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S3";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-07;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E5";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-07;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S3";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-07;platform_id:0x1)
= 0x2b000181 iucode_rev(fname:intel/06-8f-07;platform_id:0x2)
= 0x2b000181 iucode_rev(fname:intel/06-8f-07;platform_id:0x4)
= 0x2b000181 iucode_rev(fname:intel/06-8f-07;platform_id:0x80)
= 0x2c000170 iucode_rev(fname:intel/06-8f-08;cpuid:000806f4;pf_mask:0x10)
= 0x2b000181 iucode_rev(fname:intel/06-8f-08;cpuid:000806f4;pf_mask:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-08;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E0";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-08;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S1";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-08;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E0";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-08;cpuid:000806f4;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S1";pf_model:0x87)
= 0x2c000170 iucode_rev(fname:intel/06-8f-08;cpuid:000806f5;pf_mask:0x10)
= 0x2c000170 iucode_rev(fname:intel/06-8f-08;cpuid:000806f5;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids_HBM";stepping:"B1";pf_model:0x10)
= 0x2c000170 iucode_rev(fname:intel/06-8f-08;cpuid:000806f5;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids";stepping:"B1";pf_model:0x10)
= 0x2b000181 iucode_rev(fname:intel/06-8f-08;cpuid:000806f5;pf_mask:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-08;cpuid:000806f5;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E2";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-08;cpuid:000806f5;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E2";pf_model:0x87)
= 0x2c000170 iucode_rev(fname:intel/06-8f-08;cpuid:000806f6;pf_mask:0x10)
= 0x2b000181 iucode_rev(fname:intel/06-8f-08;cpuid:000806f6;pf_mask:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-08;cpuid:000806f6;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E3";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-08;cpuid:000806f6;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E3";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-08;cpuid:000806f7;pf_mask:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-08;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E4";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-08;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S2";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-08;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E4";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-08;cpuid:000806f7;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S2";pf_model:0x87)
= 0x2c000170 iucode_rev(fname:intel/06-8f-08;cpuid:000806f8;pf_mask:0x10)
= 0x2c000170 iucode_rev(fname:intel/06-8f-08;cpuid:000806f8;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids_HBM";stepping:"B3";pf_model:0x10)
= 0x2c000170 iucode_rev(fname:intel/06-8f-08;cpuid:000806f8;pf_mask:0x10;segment:"Server";codename:"Sapphire_Rapids";stepping:"B3";pf_model:0x10)
= 0x2b000181 iucode_rev(fname:intel/06-8f-08;cpuid:000806f8;pf_mask:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-08;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"E5";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-08;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids_SP";stepping:"S3";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-08;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"E5";pf_model:0x87)
= 0x2b000181 iucode_rev(fname:intel/06-8f-08;cpuid:000806f8;pf_mask:0x87;segment:"Server";codename:"Sapphire_Rapids";stepping:"S3";pf_model:0x87)
= 0x2c000170 iucode_rev(fname:intel/06-8f-08;platform_id:0x10)
= 0x2b000181 iucode_rev(fname:intel/06-8f-08;platform_id:0x1)
= 0x2b000181 iucode_rev(fname:intel/06-8f-08;platform_id:0x2)
= 0x2b000181 iucode_rev(fname:intel/06-8f-08;platform_id:0x4)
= 0x2b000181 iucode_rev(fname:intel/06-8f-08;platform_id:0x80)
= 0x17 iucode_rev(fname:intel/06-96-01;cpuid:00090661;pf_mask:0x1)
= 0x17 iucode_rev(fname:intel/06-96-01;cpuid:00090661;pf_mask:0x1;segment:"SOC";codename:"Elkhart_Rate";stepping:"B1";pf_model:0x1)
= 0x17 iucode_rev(fname:intel/06-96-01;platform_id:0x1)
= 0x2c iucode_rev(fname:intel/06-97-02;cpuid:00090672;pf_mask:0x7)
= 0x2c iucode_rev(fname:intel/06-97-02;cpuid:00090672;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake_S_8+8";stepping:"C0";pf_model:0x2)
= 0x2c iucode_rev(fname:intel/06-97-02;cpuid:00090672;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"C0";pf_model:0x2)
= 0x2c iucode_rev(fname:intel/06-97-02;cpuid:00090672;pf_mask:0x7;segment:"Mobile";codename:"Alder_Lake_HX";stepping:"C0";pf_model:0x3)
= 0x2c iucode_rev(fname:intel/06-97-02;cpuid:00090672;pf_mask:0x7;segment:"Mobile";codename:"Alder_Lake";stepping:"C0";pf_model:0x3)
= 0x2c iucode_rev(fname:intel/06-97-02;cpuid:00090675;pf_mask:0x7)
= 0x2c iucode_rev(fname:intel/06-97-02;cpuid:00090675;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake_S_6+0";stepping:"K0";pf_model:0x1)
= 0x2c iucode_rev(fname:intel/06-97-02;cpuid:00090675;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"K0";pf_model:0x1)
= 0x2c iucode_rev(fname:intel/06-97-02;cpuid:000b06f2;pf_mask:0x7)
= 0x2c iucode_rev(fname:intel/06-97-02;cpuid:000b06f2;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"C0";pf_model:0x3)
= 0x2c iucode_rev(fname:intel/06-97-02;cpuid:000b06f5;pf_mask:0x7)
= 0x2c iucode_rev(fname:intel/06-97-02;cpuid:000b06f5;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"C0";pf_model:0x3)
= 0x2c iucode_rev(fname:intel/06-97-02;platform_id:0x1)
= 0x2c iucode_rev(fname:intel/06-97-02;platform_id:0x2)
= 0x2c iucode_rev(fname:intel/06-97-02;platform_id:0x4)
= 0x2c iucode_rev(fname:intel/06-97-05;cpuid:00090672;pf_mask:0x7)
= 0x2c iucode_rev(fname:intel/06-97-05;cpuid:00090672;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake_S_8+8";stepping:"C0";pf_model:0x2)
= 0x2c iucode_rev(fname:intel/06-97-05;cpuid:00090672;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"C0";pf_model:0x2)
= 0x2c iucode_rev(fname:intel/06-97-05;cpuid:00090672;pf_mask:0x7;segment:"Mobile";codename:"Alder_Lake_HX";stepping:"C0";pf_model:0x3)
= 0x2c iucode_rev(fname:intel/06-97-05;cpuid:00090672;pf_mask:0x7;segment:"Mobile";codename:"Alder_Lake";stepping:"C0";pf_model:0x3)
= 0x2c iucode_rev(fname:intel/06-97-05;cpuid:00090675;pf_mask:0x7)
= 0x2c iucode_rev(fname:intel/06-97-05;cpuid:00090675;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake_S_6+0";stepping:"K0";pf_model:0x1)
= 0x2c iucode_rev(fname:intel/06-97-05;cpuid:00090675;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"K0";pf_model:0x1)
= 0x2c iucode_rev(fname:intel/06-97-05;cpuid:000b06f2;pf_mask:0x7)
= 0x2c iucode_rev(fname:intel/06-97-05;cpuid:000b06f2;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"C0";pf_model:0x3)
= 0x2c iucode_rev(fname:intel/06-97-05;cpuid:000b06f5;pf_mask:0x7)
= 0x2c iucode_rev(fname:intel/06-97-05;cpuid:000b06f5;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"C0";pf_model:0x3)
= 0x2c iucode_rev(fname:intel/06-97-05;platform_id:0x1)
= 0x2c iucode_rev(fname:intel/06-97-05;platform_id:0x2)
= 0x2c iucode_rev(fname:intel/06-97-05;platform_id:0x4)
= 0x429 iucode_rev(fname:intel/06-9a-03;cpuid:000906a3;pf_mask:0x80)
= 0x429 iucode_rev(fname:intel/06-9a-03;cpuid:000906a3;pf_mask:0x80;segment:"Mobile";codename:"Alder_Lake_P_6+8";stepping:"L0";pf_model:0x82)
= 0x429 iucode_rev(fname:intel/06-9a-03;cpuid:000906a3;pf_mask:0x80;segment:"Mobile";codename:"Alder_Lake";stepping:"L0";pf_model:0x82)
= 0x429 iucode_rev(fname:intel/06-9a-03;cpuid:000906a3;pf_mask:0x80;segment:"Mobile";codename:"Alder_Lake";stepping:"R0";pf_model:0x80)
= 0x429 iucode_rev(fname:intel/06-9a-03;cpuid:000906a3;pf_mask:0x80;segment:"Mobile";codename:"Alder_Lake_U_9W";stepping:"R0";pf_model:0x80)
= 0x429 iucode_rev(fname:intel/06-9a-03;cpuid:000906a4;pf_mask:0x80)
= 0x429 iucode_rev(fname:intel/06-9a-03;cpuid:000906a4;pf_mask:0x80;segment:"Mobile";codename:"Alder_Lake_P_2+8";stepping:"R0";pf_model:0x82)
= 0x429 iucode_rev(fname:intel/06-9a-03;cpuid:000906a4;pf_mask:0x80;segment:"Mobile";codename:"Alder_Lake";stepping:"R0";pf_model:0x82)
= 0x429 iucode_rev(fname:intel/06-9a-03;platform_id:0x80)
= 0x429 iucode_rev(fname:intel/06-9a-04;cpuid:000906a3;pf_mask:0x80)
= 0x429 iucode_rev(fname:intel/06-9a-04;cpuid:000906a3;pf_mask:0x80;segment:"Mobile";codename:"Alder_Lake_P_6+8";stepping:"L0";pf_model:0x82)
= 0x429 iucode_rev(fname:intel/06-9a-04;cpuid:000906a3;pf_mask:0x80;segment:"Mobile";codename:"Alder_Lake";stepping:"L0";pf_model:0x82)
= 0x429 iucode_rev(fname:intel/06-9a-04;cpuid:000906a3;pf_mask:0x80;segment:"Mobile";codename:"Alder_Lake";stepping:"R0";pf_model:0x80)
= 0x429 iucode_rev(fname:intel/06-9a-04;cpuid:000906a3;pf_mask:0x80;segment:"Mobile";codename:"Alder_Lake_U_9W";stepping:"R0";pf_model:0x80)
= 0x429 iucode_rev(fname:intel/06-9a-04;cpuid:000906a4;pf_mask:0x80)
= 0x429 iucode_rev(fname:intel/06-9a-04;cpuid:000906a4;pf_mask:0x80;segment:"Mobile";codename:"Alder_Lake_P_2+8";stepping:"R0";pf_model:0x82)
= 0x429 iucode_rev(fname:intel/06-9a-04;cpuid:000906a4;pf_mask:0x80;segment:"Mobile";codename:"Alder_Lake";stepping:"R0";pf_model:0x82)
= 0x429 iucode_rev(fname:intel/06-9a-04;platform_id:0x80)
= 0x24000024 iucode_rev(fname:intel/06-9c-00;cpuid:000906c0;pf_mask:0x1)
= 0x24000024 iucode_rev(fname:intel/06-9c-00;cpuid:000906c0;pf_mask:0x1;segment:"SOC";codename:"Jasper_Lake";stepping:"A0";pf_model:0x1)
= 0x24000024 iucode_rev(fname:intel/06-9c-00;cpuid:000906c0;pf_mask:0x1;segment:"SOC";codename:"Jasper_Lake";stepping:"A1";pf_model:0x1)
= 0x24000024 iucode_rev(fname:intel/06-9c-00;platform_id:0x1)
= 0xf0 iucode_rev(fname:intel/06-9e-09;cpuid:000906e9;pf_mask:0x2a)
= 0xf0 iucode_rev(fname:intel/06-9e-09;cpuid:000906e9;pf_mask:0x2a;segment:"Desktop";codename:"Kaby_Lake_S";stepping:"B0";pf_model:0x2a)
= 0xf0 iucode_rev(fname:intel/06-9e-09;cpuid:000906e9;pf_mask:0x2a;segment:"Desktop";codename:"Kaby_Lake";stepping:"B0";pf_model:0x2a)
= 0xf0 iucode_rev(fname:intel/06-9e-09;cpuid:000906e9;pf_mask:0x2a;segment:"Desktop";codename:"Kaby_Lake_X";stepping:"B0";pf_model:0x2a)
= 0xf0 iucode_rev(fname:intel/06-9e-09;cpuid:000906e9;pf_mask:0x2a;segment:"Mobile";codename:"Kaby_Lake_G";stepping:"B0";pf_model:0x2a)
= 0xf0 iucode_rev(fname:intel/06-9e-09;cpuid:000906e9;pf_mask:0x2a;segment:"Mobile";codename:"Kaby_Lake_H";stepping:"B0";pf_model:0x2a)
= 0xf0 iucode_rev(fname:intel/06-9e-09;cpuid:000906e9;pf_mask:0x2a;segment:"Mobile";codename:"Kaby_Lake";stepping:"B0";pf_model:0x2a)
= 0xf0 iucode_rev(fname:intel/06-9e-09;cpuid:000906e9;pf_mask:0x2a;segment:"Server";codename:"Kaby_Lake";stepping:"B0";pf_model:0x2a)
= 0xf0 iucode_rev(fname:intel/06-9e-09;cpuid:000906e9;pf_mask:0x2a;segment:"Server";codename:"Kaby_Lake_Xeon_E3";stepping:"B0";pf_model:0x2a)
= 0xf0 iucode_rev(fname:intel/06-9e-09;platform_id:0x20)
= 0xf0 iucode_rev(fname:intel/06-9e-09;platform_id:0x2)
= 0xf0 iucode_rev(fname:intel/06-9e-09;platform_id:0x8)
= 0xf0 iucode_rev(fname:intel/06-9e-0a;cpuid:000906ea;pf_mask:0x22)
= 0xf0 iucode_rev(fname:intel/06-9e-0a;cpuid:000906ea;pf_mask:0x22;segment:"Desktop";codename:"Coffee_Lake_S";stepping:"U0";pf_model:0x22)
= 0xf0 iucode_rev(fname:intel/06-9e-0a;cpuid:000906ea;pf_mask:0x22;segment:"Desktop";codename:"Coffee_Lake";stepping:"U0";pf_model:0x22)
= 0xf0 iucode_rev(fname:intel/06-9e-0a;cpuid:000906ea;pf_mask:0x22;segment:"Mobile";codename:"Coffee_Lake_H";stepping:"U0";pf_model:0x22)
= 0xf0 iucode_rev(fname:intel/06-9e-0a;cpuid:000906ea;pf_mask:0x22;segment:"Mobile";codename:"Coffee_Lake";stepping:"U0";pf_model:0x22)
= 0xf0 iucode_rev(fname:intel/06-9e-0a;cpuid:000906ea;pf_mask:0x22;segment:"Server";codename:"Coffee_Lake";stepping:"U0";pf_model:0x22)
= 0xf0 iucode_rev(fname:intel/06-9e-0a;cpuid:000906ea;pf_mask:0x22;segment:"Server";codename:"Coffee_Lake_Xeon_E";stepping:"U0";pf_model:0x22)
= 0xf0 iucode_rev(fname:intel/06-9e-0a;platform_id:0x20)
= 0xf0 iucode_rev(fname:intel/06-9e-0a;platform_id:0x2)
= 0xf0 iucode_rev(fname:intel/06-9e-0b;cpuid:000906eb;pf_mask:0x2)
= 0xf0 iucode_rev(fname:intel/06-9e-0b;cpuid:000906eb;pf_mask:0x2;segment:"Desktop";codename:"Coffee_Lake_S";stepping:"B0";pf_model:0x2)
= 0xf0 iucode_rev(fname:intel/06-9e-0b;cpuid:000906eb;pf_mask:0x2;segment:"Desktop";codename:"Coffee_Lake";stepping:"B0";pf_model:0x2)
= 0xf0 iucode_rev(fname:intel/06-9e-0b;cpuid:000906eb;pf_mask:0x2;segment:"Mobile";codename:"Coffee_Lake_H";stepping:"B0";pf_model:0x2)
= 0xf0 iucode_rev(fname:intel/06-9e-0b;cpuid:000906eb;pf_mask:0x2;segment:"Mobile";codename:"Coffee_Lake";stepping:"B0";pf_model:0x2)
= 0xf0 iucode_rev(fname:intel/06-9e-0b;cpuid:000906eb;pf_mask:0x2;segment:"Server";codename:"Coffee_Lake_E";stepping:"B0";pf_model:0x2)
= 0xf0 iucode_rev(fname:intel/06-9e-0b;cpuid:000906eb;pf_mask:0x2;segment:"Server";codename:"Coffee_Lake";stepping:"B0";pf_model:0x2)
= 0xf0 iucode_rev(fname:intel/06-9e-0b;platform_id:0x2)
= 0xf0 iucode_rev(fname:intel/06-9e-0c;cpuid:000906ec;pf_mask:0x22)
= 0xf0 iucode_rev(fname:intel/06-9e-0c;cpuid:000906ec;pf_mask:0x22;segment:"Desktop";codename:"Coffee_Lake_S";stepping:"P0";pf_model:0x22)
= 0xf0 iucode_rev(fname:intel/06-9e-0c;cpuid:000906ec;pf_mask:0x22;segment:"Desktop";codename:"Coffee_Lake";stepping:"P0";pf_model:0x22)
= 0xf0 iucode_rev(fname:intel/06-9e-0c;cpuid:000906ec;pf_mask:0x22;segment:"Mobile";codename:"Coffee_Lake_H";stepping:"P0";pf_model:0x22)
= 0xf0 iucode_rev(fname:intel/06-9e-0c;cpuid:000906ec;pf_mask:0x22;segment:"Mobile";codename:"Coffee_Lake";stepping:"P0";pf_model:0x22)
= 0xf0 iucode_rev(fname:intel/06-9e-0c;cpuid:000906ec;pf_mask:0x22;segment:"Server";codename:"Coffee_Lake";stepping:"P0";pf_model:0x22)
= 0xf0 iucode_rev(fname:intel/06-9e-0c;cpuid:000906ec;pf_mask:0x22;segment:"Server";codename:"Coffee_Lake_Xeon_E";stepping:"P0";pf_model:0x22)
= 0xf0 iucode_rev(fname:intel/06-9e-0c;platform_id:0x20)
= 0xf0 iucode_rev(fname:intel/06-9e-0c;platform_id:0x2)
= 0xf4 iucode_rev(fname:intel/06-9e-0d;cpuid:000906ed;pf_mask:0x22)
= 0xf4 iucode_rev(fname:intel/06-9e-0d;cpuid:000906ed;pf_mask:0x22;segment:"Desktop";codename:"Coffee_Lake_S";stepping:"R0";pf_model:0x22)
= 0xf4 iucode_rev(fname:intel/06-9e-0d;cpuid:000906ed;pf_mask:0x22;segment:"Desktop";codename:"Coffee_Lake";stepping:"R0";pf_model:0x22)
= 0xf4 iucode_rev(fname:intel/06-9e-0d;cpuid:000906ed;pf_mask:0x22;segment:"Mobile";codename:"Coffee_Lake_H";stepping:"R0";pf_model:0x22)
= 0xf4 iucode_rev(fname:intel/06-9e-0d;cpuid:000906ed;pf_mask:0x22;segment:"Mobile";codename:"Coffee_Lake";stepping:"R0";pf_model:0x22)
= 0xf4 iucode_rev(fname:intel/06-9e-0d;cpuid:000906ed;pf_mask:0x22;segment:"Server";codename:"Coffee_Lake";stepping:"R0";pf_model:0x22)
= 0xf4 iucode_rev(fname:intel/06-9e-0d;cpuid:000906ed;pf_mask:0x22;segment:"Server";codename:"Coffee_Lake_Xeon_E";stepping:"R0";pf_model:0x22)
= 0xf4 iucode_rev(fname:intel/06-9e-0d;platform_id:0x20)
= 0xf4 iucode_rev(fname:intel/06-9e-0d;platform_id:0x2)
= 0xf4 iucode_rev(fname:intel/06-a5-02;cpuid:000a0652;pf_mask:0x20)
= 0xf4 iucode_rev(fname:intel/06-a5-02;cpuid:000a0652;pf_mask:0x20;segment:"Mobile";codename:"Comet_Lake_H";stepping:"R1";pf_model:0x20)
= 0xf4 iucode_rev(fname:intel/06-a5-02;cpuid:000a0652;pf_mask:0x20;segment:"Mobile";codename:"Comet_Lake";stepping:"R1";pf_model:0x20)
= 0xf4 iucode_rev(fname:intel/06-a5-02;platform_id:0x20)
= 0xf4 iucode_rev(fname:intel/06-a5-03;cpuid:000a0653;pf_mask:0x22)
= 0xf4 iucode_rev(fname:intel/06-a5-03;cpuid:000a0653;pf_mask:0x22;segment:"Desktop";codename:"Comet_Lake_S_6+2";stepping:"G1";pf_model:0x22)
= 0xf4 iucode_rev(fname:intel/06-a5-03;cpuid:000a0653;pf_mask:0x22;segment:"Desktop";codename:"Comet_Lake";stepping:"G1";pf_model:0x22)
= 0xf4 iucode_rev(fname:intel/06-a5-03;platform_id:0x20)
= 0xf4 iucode_rev(fname:intel/06-a5-03;platform_id:0x2)
= 0xf4 iucode_rev(fname:intel/06-a5-05;cpuid:000a0655;pf_mask:0x22)
= 0xf4 iucode_rev(fname:intel/06-a5-05;cpuid:000a0655;pf_mask:0x22;segment:"Desktop";codename:"Comet_Lake_S_10+2";stepping:"Q0";pf_model:0x22)
= 0xf4 iucode_rev(fname:intel/06-a5-05;cpuid:000a0655;pf_mask:0x22;segment:"Desktop";codename:"Comet_Lake";stepping:"Q0";pf_model:0x22)
= 0xf4 iucode_rev(fname:intel/06-a5-05;platform_id:0x20)
= 0xf4 iucode_rev(fname:intel/06-a5-05;platform_id:0x2)
= 0xf4 iucode_rev(fname:intel/06-a6-00;cpuid:000a0660;pf_mask:0x80)
= 0xf4 iucode_rev(fname:intel/06-a6-00;cpuid:000a0660;pf_mask:0x80;segment:"Mobile";codename:"Comet_Lake";stepping:"A0";pf_model:0x80)
= 0xf4 iucode_rev(fname:intel/06-a6-00;cpuid:000a0660;pf_mask:0x80;segment:"Mobile";codename:"Comet_Lake_U_6+2";stepping:"A0";pf_model:0x80)
= 0xf4 iucode_rev(fname:intel/06-a6-00;platform_id:0x80)
= 0xf4 iucode_rev(fname:intel/06-a6-01;cpuid:000a0661;pf_mask:0x80)
= 0xf4 iucode_rev(fname:intel/06-a6-01;cpuid:000a0661;pf_mask:0x80;segment:"Mobile";codename:"Comet_Lake";stepping:"K1";pf_model:0x80)
= 0xf4 iucode_rev(fname:intel/06-a6-01;cpuid:000a0661;pf_mask:0x80;segment:"Mobile";codename:"Comet_Lake_U_6+2_v2";stepping:"K1";pf_model:0x80)
= 0xf4 iucode_rev(fname:intel/06-a6-01;platform_id:0x80)
= 0x57 iucode_rev(fname:intel/06-a7-01;cpuid:000a0671;pf_mask:0x2)
= 0x57 iucode_rev(fname:intel/06-a7-01;cpuid:000a0671;pf_mask:0x2;segment:"Desktop";codename:"Rocket_Lake_S";stepping:"B0";pf_model:0x2)
= 0x57 iucode_rev(fname:intel/06-a7-01;cpuid:000a0671;pf_mask:0x2;segment:"Desktop";codename:"Rocket_Lake";stepping:"B0";pf_model:0x2)
= 0x57 iucode_rev(fname:intel/06-a7-01;platform_id:0x2)
= 0x112 iucode_rev(fname:intel/06-b7-01;cpuid:000b0671;pf_mask:0x32)
= 0x112 iucode_rev(fname:intel/06-b7-01;cpuid:000b0671;pf_mask:0x32;segment:"Desktop";codename:"Raptor_Lake_S";stepping:"S0";pf_model:0x32)
= 0x112 iucode_rev(fname:intel/06-b7-01;cpuid:000b0671;pf_mask:0x32;segment:"Desktop";codename:"Raptor_Lake";stepping:"S0";pf_model:0x32)
= 0x112 iucode_rev(fname:intel/06-b7-01;platform_id:0x10)
= 0x112 iucode_rev(fname:intel/06-b7-01;platform_id:0x20)
= 0x112 iucode_rev(fname:intel/06-b7-01;platform_id:0x2)
= 0x410e iucode_rev(fname:intel/06-ba-02;cpuid:000b06a2;pf_mask:0xc0)
= 0x410e iucode_rev(fname:intel/06-ba-02;cpuid:000b06a3;pf_mask:0xc0)
= 0x410e iucode_rev(fname:intel/06-ba-02;platform_id:0x40)
= 0x410e iucode_rev(fname:intel/06-ba-02;platform_id:0x80)
= 0x410e iucode_rev(fname:intel/06-ba-03;cpuid:000b06a2;pf_mask:0xc0)
= 0x410e iucode_rev(fname:intel/06-ba-03;cpuid:000b06a3;pf_mask:0xc0)
= 0x410e iucode_rev(fname:intel/06-ba-03;platform_id:0x40)
= 0x410e iucode_rev(fname:intel/06-ba-03;platform_id:0x80)
= 0x2c iucode_rev(fname:intel/06-bf-02;cpuid:00090672;pf_mask:0x7)
= 0x2c iucode_rev(fname:intel/06-bf-02;cpuid:00090672;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake_S_8+8";stepping:"C0";pf_model:0x2)
= 0x2c iucode_rev(fname:intel/06-bf-02;cpuid:00090672;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"C0";pf_model:0x2)
= 0x2c iucode_rev(fname:intel/06-bf-02;cpuid:00090672;pf_mask:0x7;segment:"Mobile";codename:"Alder_Lake_HX";stepping:"C0";pf_model:0x3)
= 0x2c iucode_rev(fname:intel/06-bf-02;cpuid:00090672;pf_mask:0x7;segment:"Mobile";codename:"Alder_Lake";stepping:"C0";pf_model:0x3)
= 0x2c iucode_rev(fname:intel/06-bf-02;cpuid:00090675;pf_mask:0x7)
= 0x2c iucode_rev(fname:intel/06-bf-02;cpuid:00090675;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake_S_6+0";stepping:"K0";pf_model:0x1)
= 0x2c iucode_rev(fname:intel/06-bf-02;cpuid:00090675;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"K0";pf_model:0x1)
= 0x2c iucode_rev(fname:intel/06-bf-02;cpuid:000b06f2;pf_mask:0x7)
= 0x2c iucode_rev(fname:intel/06-bf-02;cpuid:000b06f2;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"C0";pf_model:0x3)
= 0x2c iucode_rev(fname:intel/06-bf-02;cpuid:000b06f5;pf_mask:0x7)
= 0x2c iucode_rev(fname:intel/06-bf-02;cpuid:000b06f5;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"C0";pf_model:0x3)
= 0x2c iucode_rev(fname:intel/06-bf-02;platform_id:0x1)
= 0x2c iucode_rev(fname:intel/06-bf-02;platform_id:0x2)
= 0x2c iucode_rev(fname:intel/06-bf-02;platform_id:0x4)
= 0x2c iucode_rev(fname:intel/06-bf-05;cpuid:00090672;pf_mask:0x7)
= 0x2c iucode_rev(fname:intel/06-bf-05;cpuid:00090672;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake_S_8+8";stepping:"C0";pf_model:0x2)
= 0x2c iucode_rev(fname:intel/06-bf-05;cpuid:00090672;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"C0";pf_model:0x2)
= 0x2c iucode_rev(fname:intel/06-bf-05;cpuid:00090672;pf_mask:0x7;segment:"Mobile";codename:"Alder_Lake_HX";stepping:"C0";pf_model:0x3)
= 0x2c iucode_rev(fname:intel/06-bf-05;cpuid:00090672;pf_mask:0x7;segment:"Mobile";codename:"Alder_Lake";stepping:"C0";pf_model:0x3)
= 0x2c iucode_rev(fname:intel/06-bf-05;cpuid:00090675;pf_mask:0x7)
= 0x2c iucode_rev(fname:intel/06-bf-05;cpuid:00090675;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake_S_6+0";stepping:"K0";pf_model:0x1)
= 0x2c iucode_rev(fname:intel/06-bf-05;cpuid:00090675;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"K0";pf_model:0x1)
= 0x2c iucode_rev(fname:intel/06-bf-05;cpuid:000b06f2;pf_mask:0x7)
= 0x2c iucode_rev(fname:intel/06-bf-05;cpuid:000b06f2;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"C0";pf_model:0x3)
= 0x2c iucode_rev(fname:intel/06-bf-05;cpuid:000b06f5;pf_mask:0x7)
= 0x2c iucode_rev(fname:intel/06-bf-05;cpuid:000b06f5;pf_mask:0x7;segment:"Desktop";codename:"Alder_Lake";stepping:"C0";pf_model:0x3)
= 0x2c iucode_rev(fname:intel/06-bf-05;platform_id:0x1)
= 0x2c iucode_rev(fname:intel/06-bf-05;platform_id:0x2)
= 0x2c iucode_rev(fname:intel/06-bf-05;platform_id:0x4)
= 0x12 iucode_rev(fname:intel/0f-00-07;cpuid:00000f07;pf_mask:0x1)
= 0x12 iucode_rev(fname:intel/0f-00-07;cpuid:00000f07;pf_mask:0x1;segment:"Desktop";codename:"Willamette_[NetBurst]";stepping:"B2";pf_model:0x1)
= 0x8 iucode_rev(fname:intel/0f-00-07;cpuid:00000f07;pf_mask:0x2)
= 0x8 iucode_rev(fname:intel/0f-00-07;cpuid:00000f07;pf_mask:0x2;segment:"Server";codename:"Foster_DP_[NetBurst]";stepping:"B2";pf_model:0x2)
= 0x12 iucode_rev(fname:intel/0f-00-07;platform_id:0x1)
= 0x8 iucode_rev(fname:intel/0f-00-07;platform_id:0x2)
= 0x13 iucode_rev(fname:intel/0f-00-0a;cpuid:00000f0a;pf_mask:0x1)
= 0x13 iucode_rev(fname:intel/0f-00-0a;cpuid:00000f0a;pf_mask:0x1;segment:"Desktop";codename:"Willamette_[NetBurst]";stepping:"C1";pf_model:0x1)
= 0x15 iucode_rev(fname:intel/0f-00-0a;cpuid:00000f0a;pf_mask:0x2)
= 0x15 iucode_rev(fname:intel/0f-00-0a;cpuid:00000f0a;pf_mask:0x2;segment:"Server";codename:"Foster_DP_[NetBurst]";stepping:"C1";pf_model:0x2)
= 0x14 iucode_rev(fname:intel/0f-00-0a;cpuid:00000f0a;pf_mask:0x4)
= 0x14 iucode_rev(fname:intel/0f-00-0a;cpuid:00000f0a;pf_mask:0x4;segment:"Desktop";codename:"Willamette_[NetBurst]";stepping:"C1";pf_model:0x4)
= 0x13 iucode_rev(fname:intel/0f-00-0a;platform_id:0x1)
= 0x15 iucode_rev(fname:intel/0f-00-0a;platform_id:0x2)
= 0x14 iucode_rev(fname:intel/0f-00-0a;platform_id:0x4)
= 0x2e iucode_rev(fname:intel/0f-01-02;cpuid:00000f12;pf_mask:0x4)
= 0x2e iucode_rev(fname:intel/0f-01-02;cpuid:00000f12;pf_mask:0x4;segment:"Desktop";codename:"Willamette_[NetBurst]";stepping:"D0";pf_model:0x4)
= 0x2e iucode_rev(fname:intel/0f-01-02;platform_id:0x4)
= 0x21 iucode_rev(fname:intel/0f-02-04;cpuid:00000f24;pf_mask:0x10)
= 0x21 iucode_rev(fname:intel/0f-02-04;cpuid:00000f24;pf_mask:0x10;segment:"Mobile";codename:"Northwood_[NetBurst]";stepping:"B0";pf_model:0x10)
= 0x1f iucode_rev(fname:intel/0f-02-04;cpuid:00000f24;pf_mask:0x2)
= 0x1f iucode_rev(fname:intel/0f-02-04;cpuid:00000f24;pf_mask:0x2;segment:"Server";codename:"Prestonia_[NetBurst]";stepping:"B0";pf_model:0x2)
= 0x1e iucode_rev(fname:intel/0f-02-04;cpuid:00000f24;pf_mask:0x4)
= 0x1e iucode_rev(fname:intel/0f-02-04;cpuid:00000f24;pf_mask:0x4;segment:"Desktop";codename:"Northwood_[NetBurst]";stepping:"B0";pf_model:0x4)
= 0x21 iucode_rev(fname:intel/0f-02-04;platform_id:0x10)
= 0x1f iucode_rev(fname:intel/0f-02-04;platform_id:0x2)
= 0x1e iucode_rev(fname:intel/0f-02-04;platform_id:0x4)
= 0x2c iucode_rev(fname:intel/0f-02-05;cpuid:00000f25;pf_mask:0x10)
= 0x2c iucode_rev(fname:intel/0f-02-05;cpuid:00000f25;pf_mask:0x10;segment:"Desktop";codename:"Northwood_[NetBurst]";stepping:"B1";pf_model:0x14)
= 0x2c iucode_rev(fname:intel/0f-02-05;cpuid:00000f25;pf_mask:0x10;segment:"Desktop";codename:"Northwood_[NetBurst]";stepping:"M0";pf_model:0x14)
= 0x29 iucode_rev(fname:intel/0f-02-05;cpuid:00000f25;pf_mask:0x1)
= 0x29 iucode_rev(fname:intel/0f-02-05;cpuid:00000f25;pf_mask:0x1;segment:"Server";codename:"Prestonia_[NetBurst]";stepping:"B1";pf_model:0x1)
= 0x29 iucode_rev(fname:intel/0f-02-05;cpuid:00000f25;pf_mask:0x1;segment:"Server";codename:"Prestonia_[NetBurst]";stepping:"M0";pf_model:0x1)
= 0x2a iucode_rev(fname:intel/0f-02-05;cpuid:00000f25;pf_mask:0x2)
= 0x2a iucode_rev(fname:intel/0f-02-05;cpuid:00000f25;pf_mask:0x2;segment:"Server";codename:"Gallatin_[NetBurst]";stepping:"B1";pf_model:0x2)
= 0x2b iucode_rev(fname:intel/0f-02-05;cpuid:00000f25;pf_mask:0x4)
= 0x2b iucode_rev(fname:intel/0f-02-05;cpuid:00000f25;pf_mask:0x4;segment:"Desktop";codename:"Northwood_[NetBurst]";stepping:"B1";pf_model:0x14)
= 0x2b iucode_rev(fname:intel/0f-02-05;cpuid:00000f25;pf_mask:0x4;segment:"Desktop";codename:"Northwood_[NetBurst]";stepping:"M0";pf_model:0x14)
= 0x2c iucode_rev(fname:intel/0f-02-05;platform_id:0x10)
= 0x29 iucode_rev(fname:intel/0f-02-05;platform_id:0x1)
= 0x2a iucode_rev(fname:intel/0f-02-05;platform_id:0x2)
= 0x2b iucode_rev(fname:intel/0f-02-05;platform_id:0x4)
= 0x10 iucode_rev(fname:intel/0f-02-06;cpuid:00000f26;pf_mask:0x2)
= 0x10 iucode_rev(fname:intel/0f-02-06;cpuid:00000f26;pf_mask:0x2;segment:"Server";codename:"Gallatin_[NetBurst]";stepping:"B1";pf_model:0x2)
= 0x10 iucode_rev(fname:intel/0f-02-06;platform_id:0x2)
= 0x38 iucode_rev(fname:intel/0f-02-07;cpuid:00000f27;pf_mask:0x2)
= 0x38 iucode_rev(fname:intel/0f-02-07;cpuid:00000f27;pf_mask:0x2;segment:"Server";codename:"Prestonia_[NetBurst]";stepping:"C1";pf_model:0x2)
= 0x37 iucode_rev(fname:intel/0f-02-07;cpuid:00000f27;pf_mask:0x4)
= 0x37 iucode_rev(fname:intel/0f-02-07;cpuid:00000f27;pf_mask:0x4;segment:"Desktop";codename:"Northwood_[NetBurst]";stepping:"C1";pf_model:0x4)
= 0x39 iucode_rev(fname:intel/0f-02-07;cpuid:00000f27;pf_mask:0x8)
= 0x39 iucode_rev(fname:intel/0f-02-07;cpuid:00000f27;pf_mask:0x8;segment:"Mobile";codename:"Northwood_[NetBurst]";stepping:"C1";pf_model:0x8)
= 0x38 iucode_rev(fname:intel/0f-02-07;platform_id:0x2)
= 0x37 iucode_rev(fname:intel/0f-02-07;platform_id:0x4)
= 0x39 iucode_rev(fname:intel/0f-02-07;platform_id:0x8)
= 0x2d iucode_rev(fname:intel/0f-02-09;cpuid:00000f29;pf_mask:0x2)
= 0x2d iucode_rev(fname:intel/0f-02-09;cpuid:00000f29;pf_mask:0x2;segment:"Server";codename:"Prestonia_[NetBurst]";stepping:"D1";pf_model:0x2)
= 0x2e iucode_rev(fname:intel/0f-02-09;cpuid:00000f29;pf_mask:0x4)
= 0x2e iucode_rev(fname:intel/0f-02-09;cpuid:00000f29;pf_mask:0x4;segment:"Desktop";codename:"Northwood_[NetBurst]";stepping:"D1";pf_model:0x4)
= 0x2f iucode_rev(fname:intel/0f-02-09;cpuid:00000f29;pf_mask:0x8)
= 0x2f iucode_rev(fname:intel/0f-02-09;cpuid:00000f29;pf_mask:0x8;segment:"Mobile";codename:"Northwood_[NetBurst]";stepping:"D1";pf_model:0x8)
= 0x2d iucode_rev(fname:intel/0f-02-09;platform_id:0x2)
= 0x2e iucode_rev(fname:intel/0f-02-09;platform_id:0x4)
= 0x2f iucode_rev(fname:intel/0f-02-09;platform_id:0x8)
= 0xa iucode_rev(fname:intel/0f-03-02;cpuid:00000f32;pf_mask:0xd)
= 0xa iucode_rev(fname:intel/0f-03-02;cpuid:00000f32;pf_mask:0xd;segment:"Desktop";codename:"Prescott_[NetBurst]";stepping:"B1";pf_model:0xd)
= 0xa iucode_rev(fname:intel/0f-03-02;platform_id:0x1)
= 0xa iucode_rev(fname:intel/0f-03-02;platform_id:0x4)
= 0xa iucode_rev(fname:intel/0f-03-02;platform_id:0x8)
= 0xc iucode_rev(fname:intel/0f-03-03;cpuid:00000f33;pf_mask:0xd)
= 0xc iucode_rev(fname:intel/0f-03-03;cpuid:00000f33;pf_mask:0xd;segment:"Desktop";codename:"Prescott_[NetBurst]";stepping:"C0";pf_model:0xd)
= 0xc iucode_rev(fname:intel/0f-03-03;platform_id:0x1)
= 0xc iucode_rev(fname:intel/0f-03-03;platform_id:0x4)
= 0xc iucode_rev(fname:intel/0f-03-03;platform_id:0x8)
= 0x17 iucode_rev(fname:intel/0f-03-04;cpuid:00000f34;pf_mask:0x1d)
= 0x17 iucode_rev(fname:intel/0f-03-04;cpuid:00000f34;pf_mask:0x1d;segment:"Desktop";codename:"Prescott_[NetBurst]";stepping:"D0";pf_model:0x1d)
= 0x17 iucode_rev(fname:intel/0f-03-04;cpuid:00000f34;pf_mask:0x1d;segment:"Server";codename:"Nocona_[NetBurst]";stepping:"D0";pf_model:0x1d)
= 0x17 iucode_rev(fname:intel/0f-03-04;platform_id:0x10)
= 0x17 iucode_rev(fname:intel/0f-03-04;platform_id:0x1)
= 0x17 iucode_rev(fname:intel/0f-03-04;platform_id:0x4)
= 0x17 iucode_rev(fname:intel/0f-03-04;platform_id:0x8)
= 0x16 iucode_rev(fname:intel/0f-04-01;cpuid:00000f41;pf_mask:0x2)
= 0x16 iucode_rev(fname:intel/0f-04-01;cpuid:00000f41;pf_mask:0x2;segment:"Server";codename:"Protomac_[NetBurst]";stepping:"C0";pf_model:0x2)
= 0x17 iucode_rev(fname:intel/0f-04-01;cpuid:00000f41;pf_mask:0xbd)
= 0x17 iucode_rev(fname:intel/0f-04-01;cpuid:00000f41;pf_mask:0xbd;segment:"Desktop";codename:"Prescott_[NetBurst]";stepping:"E0";pf_model:0xbd)
= 0x17 iucode_rev(fname:intel/0f-04-01;cpuid:00000f41;pf_mask:0xbd;segment:"Server";codename:"Cranford_[NetBurst]";stepping:"A0";pf_model:0xbd)
= 0x17 iucode_rev(fname:intel/0f-04-01;cpuid:00000f41;pf_mask:0xbd;segment:"Server";codename:"Nocona_[NetBurst]";stepping:"E0";pf_model:0xbd)
= 0x17 iucode_rev(fname:intel/0f-04-01;platform_id:0x10)
= 0x17 iucode_rev(fname:intel/0f-04-01;platform_id:0x1)
= 0x17 iucode_rev(fname:intel/0f-04-01;platform_id:0x20)
= 0x16 iucode_rev(fname:intel/0f-04-01;platform_id:0x2)
= 0x17 iucode_rev(fname:intel/0f-04-01;platform_id:0x4)
= 0x17 iucode_rev(fname:intel/0f-04-01;platform_id:0x80)
= 0x17 iucode_rev(fname:intel/0f-04-01;platform_id:0x8)
= 0x5 iucode_rev(fname:intel/0f-04-03;cpuid:00000f43;pf_mask:0x9d)
= 0x5 iucode_rev(fname:intel/0f-04-03;cpuid:00000f43;pf_mask:0x9d;segment:"Desktop";codename:"Prescott_[NetBurst]";stepping:"N0";pf_model:0x9d)
= 0x5 iucode_rev(fname:intel/0f-04-03;cpuid:00000f43;pf_mask:0x9d;segment:"Server";codename:"Irwindale_[NetBurst]";stepping:"N0";pf_model:0x9d)
= 0x5 iucode_rev(fname:intel/0f-04-03;platform_id:0x10)
= 0x5 iucode_rev(fname:intel/0f-04-03;platform_id:0x1)
= 0x5 iucode_rev(fname:intel/0f-04-03;platform_id:0x4)
= 0x5 iucode_rev(fname:intel/0f-04-03;platform_id:0x80)
= 0x5 iucode_rev(fname:intel/0f-04-03;platform_id:0x8)
= 0x6 iucode_rev(fname:intel/0f-04-04;cpuid:00000f44;pf_mask:0x9d)
= 0x6 iucode_rev(fname:intel/0f-04-04;cpuid:00000f44;pf_mask:0x9d;segment:"Desktop";codename:"Smithfield_[NetBurst]";stepping:"A0";pf_model:0x9d)
= 0x6 iucode_rev(fname:intel/0f-04-04;platform_id:0x10)
= 0x6 iucode_rev(fname:intel/0f-04-04;platform_id:0x1)
= 0x6 iucode_rev(fname:intel/0f-04-04;platform_id:0x4)
= 0x6 iucode_rev(fname:intel/0f-04-04;platform_id:0x80)
= 0x6 iucode_rev(fname:intel/0f-04-04;platform_id:0x8)
= 0x3 iucode_rev(fname:intel/0f-04-07;cpuid:00000f47;pf_mask:0x9d)
= 0x3 iucode_rev(fname:intel/0f-04-07;cpuid:00000f47;pf_mask:0x9d;segment:"Desktop";codename:"Smithfield_[NetBurst]";stepping:"B0";pf_model:0x9d)
= 0x3 iucode_rev(fname:intel/0f-04-07;platform_id:0x10)
= 0x3 iucode_rev(fname:intel/0f-04-07;platform_id:0x1)
= 0x3 iucode_rev(fname:intel/0f-04-07;platform_id:0x4)
= 0x3 iucode_rev(fname:intel/0f-04-07;platform_id:0x80)
= 0x3 iucode_rev(fname:intel/0f-04-07;platform_id:0x8)
= 0xc iucode_rev(fname:intel/0f-04-08;cpuid:00000f48;pf_mask:0x1)
= 0xc iucode_rev(fname:intel/0f-04-08;cpuid:00000f48;pf_mask:0x1;segment:"Server";codename:"Paxwille_[NetBurst]";stepping:"A0";pf_model:0x1)
= 0xe iucode_rev(fname:intel/0f-04-08;cpuid:00000f48;pf_mask:0x2)
= 0xe iucode_rev(fname:intel/0f-04-08;cpuid:00000f48;pf_mask:0x2;segment:"Server";codename:"Paxwille_[NetBurst]";stepping:"A0";pf_model:0x2)
= 0x7 iucode_rev(fname:intel/0f-04-08;cpuid:00000f48;pf_mask:0x5f)
= 0x7 iucode_rev(fname:intel/0f-04-08;cpuid:00000f48;pf_mask:0x5f;segment:"Server";codename:"Paxwille_[NetBurst]";stepping:"A0";pf_model:0x1)
= 0x7 iucode_rev(fname:intel/0f-04-08;cpuid:00000f48;pf_mask:0x5f;segment:"Server";codename:"Paxwille_[NetBurst]";stepping:"A0";pf_model:0x2)
= 0x7 iucode_rev(fname:intel/0f-04-08;platform_id:0x10)
= 0x7 iucode_rev(fname:intel/0f-04-08;platform_id:0x1)
= 0xc iucode_rev(fname:intel/0f-04-08;platform_id:0x1)
= 0x7 iucode_rev(fname:intel/0f-04-08;platform_id:0x2)
= 0xe iucode_rev(fname:intel/0f-04-08;platform_id:0x2)
= 0x7 iucode_rev(fname:intel/0f-04-08;platform_id:0x40)
= 0x7 iucode_rev(fname:intel/0f-04-08;platform_id:0x4)
= 0x7 iucode_rev(fname:intel/0f-04-08;platform_id:0x8)
= 0x3 iucode_rev(fname:intel/0f-04-09;cpuid:00000f49;pf_mask:0xbd)
= 0x3 iucode_rev(fname:intel/0f-04-09;cpuid:00000f49;pf_mask:0xbd;segment:"Desktop";codename:"Prescott_[NetBurst]";stepping:"G1";pf_model:0xbd)
= 0x3 iucode_rev(fname:intel/0f-04-09;cpuid:00000f49;pf_mask:0xbd;segment:"Server";codename:"Cranford_[NetBurst]";stepping:"B0";pf_model:0xbd)
= 0x3 iucode_rev(fname:intel/0f-04-09;cpuid:00000f49;pf_mask:0xbd;segment:"Server";codename:"Nocona_[NetBurst]";stepping:"G1";pf_model:0xbd)
= 0x3 iucode_rev(fname:intel/0f-04-09;platform_id:0x10)
= 0x3 iucode_rev(fname:intel/0f-04-09;platform_id:0x1)
= 0x3 iucode_rev(fname:intel/0f-04-09;platform_id:0x20)
= 0x3 iucode_rev(fname:intel/0f-04-09;platform_id:0x4)
= 0x3 iucode_rev(fname:intel/0f-04-09;platform_id:0x80)
= 0x3 iucode_rev(fname:intel/0f-04-09;platform_id:0x8)
= 0x4 iucode_rev(fname:intel/0f-04-0a;cpuid:00000f4a;pf_mask:0x5c)
= 0x4 iucode_rev(fname:intel/0f-04-0a;cpuid:00000f4a;pf_mask:0x5c;segment:"Desktop";codename:"Prescott_[NetBurst]";stepping:"R0";pf_model:0x5c)
= 0x4 iucode_rev(fname:intel/0f-04-0a;cpuid:00000f4a;pf_mask:0x5c;segment:"Server";codename:"Irwindale_[NetBurst]";stepping:"R0";pf_model:0x5d)
= 0x2 iucode_rev(fname:intel/0f-04-0a;cpuid:00000f4a;pf_mask:0x5d)
= 0x2 iucode_rev(fname:intel/0f-04-0a;cpuid:00000f4a;pf_mask:0x5d;segment:"Desktop";codename:"Prescott_[NetBurst]";stepping:"R0";pf_model:0x5c)
= 0x2 iucode_rev(fname:intel/0f-04-0a;cpuid:00000f4a;pf_mask:0x5d;segment:"Server";codename:"Irwindale_[NetBurst]";stepping:"R0";pf_model:0x5d)
= 0x2 iucode_rev(fname:intel/0f-04-0a;platform_id:0x10)
= 0x4 iucode_rev(fname:intel/0f-04-0a;platform_id:0x10)
= 0x2 iucode_rev(fname:intel/0f-04-0a;platform_id:0x1)
= 0x2 iucode_rev(fname:intel/0f-04-0a;platform_id:0x40)
= 0x4 iucode_rev(fname:intel/0f-04-0a;platform_id:0x40)
= 0x2 iucode_rev(fname:intel/0f-04-0a;platform_id:0x4)
= 0x4 iucode_rev(fname:intel/0f-04-0a;platform_id:0x4)
= 0x2 iucode_rev(fname:intel/0f-04-0a;platform_id:0x8)
= 0x4 iucode_rev(fname:intel/0f-04-0a;platform_id:0x8)
= 0xf iucode_rev(fname:intel/0f-06-02;cpuid:00000f62;pf_mask:0x4)
= 0xf iucode_rev(fname:intel/0f-06-02;cpuid:00000f62;pf_mask:0x4;segment:"Desktop";codename:"Cedar_Mill_[NetBurst]";stepping:"B1";pf_model:0x4)
= 0xf iucode_rev(fname:intel/0f-06-02;cpuid:00000f62;pf_mask:0x4;segment:"Desktop";codename:"Presler_[NetBurst]";stepping:"B1";pf_model:0x4)
= 0xf iucode_rev(fname:intel/0f-06-02;platform_id:0x4)
= 0x2 iucode_rev(fname:intel/0f-06-04;cpuid:00000f64;pf_mask:0x1)
= 0x2 iucode_rev(fname:intel/0f-06-04;cpuid:00000f64;pf_mask:0x1;segment:"Server";codename:"Dempsey_[NetBurst]";stepping:"C1";pf_model:0x1)
= 0x4 iucode_rev(fname:intel/0f-06-04;cpuid:00000f64;pf_mask:0x34)
= 0x4 iucode_rev(fname:intel/0f-06-04;cpuid:00000f64;pf_mask:0x34;segment:"Desktop";codename:"Cedar_Mill_[NetBurst]";stepping:"C1";pf_model:0x34)
= 0x4 iucode_rev(fname:intel/0f-06-04;cpuid:00000f64;pf_mask:0x34;segment:"Desktop";codename:"Presler_[NetBurst]";stepping:"C1";pf_model:0x34)
= 0x4 iucode_rev(fname:intel/0f-06-04;platform_id:0x10)
= 0x2 iucode_rev(fname:intel/0f-06-04;platform_id:0x1)
= 0x4 iucode_rev(fname:intel/0f-06-04;platform_id:0x20)
= 0x4 iucode_rev(fname:intel/0f-06-04;platform_id:0x4)
= 0x8 iucode_rev(fname:intel/0f-06-05;cpuid:00000f65;pf_mask:0x1)
= 0x8 iucode_rev(fname:intel/0f-06-05;cpuid:00000f65;pf_mask:0x1;segment:"Server";codename:"Dempsey_[NetBurst]";stepping:"D0";pf_model:0x1)
= 0x8 iucode_rev(fname:intel/0f-06-05;platform_id:0x1)
= 0x9 iucode_rev(fname:intel/0f-06-08;cpuid:00000f68;pf_mask:0x22)
= 0x9 iucode_rev(fname:intel/0f-06-08;cpuid:00000f68;pf_mask:0x22;segment:"Server";codename:"Tulsa_[NetBurst]";stepping:"B0";pf_model:0x22)
= 0x9 iucode_rev(fname:intel/0f-06-08;platform_id:0x20)
= 0x9 iucode_rev(fname:intel/0f-06-08;platform_id:0x2)


نحوه نصب


نصب پکیج rpm microcode_ctl:

    sudo yum localinstall microcode_ctl-2.1-73.16.el7_9.x86_64.rpm


فایل ها

مسیرها
/lib/firmware/intel-ucode
/usr/lib/dracut/dracut.conf.d/01-microcode.conf
/usr/lib/dracut/dracut.conf.d/99-microcode-override.conf
/usr/lib/dracut/modules.d/99microcode_ctl-fw_dir_override
/usr/lib/dracut/modules.d/99microcode_ctl-fw_dir_override/module-setup.sh
/usr/lib/systemd/system/microcode.service
/usr/libexec/microcode_ctl
/usr/libexec/microcode_ctl/check_caveats
/usr/libexec/microcode_ctl/reload_microcode
/usr/libexec/microcode_ctl/update_ucode
/usr/sbin/intel-microcode2ucode
/usr/share/doc/microcode_ctl
/usr/share/doc/microcode_ctl/LICENSE.intel-ucode
/usr/share/doc/microcode_ctl/README
/usr/share/doc/microcode_ctl/README.caveats
/usr/share/doc/microcode_ctl/README.intel-ucode
/usr/share/doc/microcode_ctl/RELEASE_NOTES.intel-ucode
/usr/share/doc/microcode_ctl/SECURITY.intel-ucode
/usr/share/doc/microcode_ctl/SUMMARY.intel-ucode
/usr/share/doc/microcode_ctl/caveats
/usr/share/doc/microcode_ctl/caveats/06-2d-07_readme
/usr/share/doc/microcode_ctl/caveats/06-4e-03_readme
/usr/share/doc/microcode_ctl/caveats/06-4f-01_readme
/usr/share/doc/microcode_ctl/caveats/06-55-04_readme
/usr/share/doc/microcode_ctl/caveats/06-5e-03_readme
/usr/share/doc/microcode_ctl/caveats/06-8c-01_readme
/usr/share/doc/microcode_ctl/caveats/intel_readme
/usr/share/man/man8/intel-microcode2ucode.8.gz
/usr/share/microcode_ctl
/usr/share/microcode_ctl/intel-ucode
/usr/share/microcode_ctl/ucode_with_caveats
/usr/share/microcode_ctl/ucode_with_caveats/intel
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-2d-07
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-2d-07/config
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-2d-07/disclaimer
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-2d-07/intel-ucode
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-2d-07/intel-ucode/06-2d-07
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-2d-07/readme
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-4e-03
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-4e-03/config
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-4e-03/disclaimer
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-4e-03/intel-ucode
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-4e-03/intel-ucode/06-4e-03
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-4e-03/readme
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-4f-01
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-4f-01/config
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-4f-01/disclaimer
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-4f-01/intel-ucode
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-4f-01/intel-ucode/06-4f-01
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-4f-01/readme
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-55-04
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-55-04/config
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-55-04/disclaimer
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-55-04/intel-ucode
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-55-04/intel-ucode/06-55-04
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-55-04/readme
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-5e-03
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-5e-03/config
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-5e-03/disclaimer
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-5e-03/intel-ucode
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-5e-03/intel-ucode/06-5e-03
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-5e-03/readme
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-8c-01
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-8c-01/config
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-8c-01/disclaimer
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-8c-01/intel-ucode
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-8c-01/intel-ucode/06-8c-01
/usr/share/microcode_ctl/ucode_with_caveats/intel-06-8c-01/readme
/usr/share/microcode_ctl/ucode_with_caveats/intel/config
/usr/share/microcode_ctl/ucode_with_caveats/intel/disclaimer
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-03-02
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-05-00
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-05-01
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-05-02
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-05-03
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-06-00
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-06-05
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-06-0a
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-06-0d
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-07-01
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-07-02
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-07-03
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-08-01
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-08-03
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-08-06
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-08-0a
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-09-05
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-0a-00
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-0a-01
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-0b-01
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-0b-04
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-0d-06
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-0e-08
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-0e-0c
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-0f-02
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-0f-06
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-0f-07
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-0f-0a
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-0f-0b
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-0f-0d
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-16-01
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-17-06
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-17-07
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-17-0a
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-1a-04
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-1a-05
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-1c-02
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-1c-0a
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-1d-01
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-1e-05
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-25-02
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-25-05
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-26-01
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-2a-07
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-2c-02
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-2d-06
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-2d-07
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-2e-06
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-2f-02
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-37-08
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-37-09
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-3a-09
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-3c-03
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-3d-04
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-3e-04
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-3e-06
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-3e-07
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-3f-02
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-3f-04
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-45-01
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-46-01
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-47-01
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-4c-03
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-4c-04
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-4d-08
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-4e-03
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-55-03
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-55-04
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-55-05
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-55-06
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-55-07
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-55-0b
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-56-02
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-56-03
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-56-04
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-56-05
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-5c-02
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-5c-09
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-5c-0a
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-5e-03
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-5f-01
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-66-03
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-6a-05
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-6a-06
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-6c-01
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-7a-01
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-7a-08
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-7e-05
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-8a-01
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-8c-02
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-8d-01
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-8e-09
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-8e-0a
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-8e-0b
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-8e-0c
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-8f-04
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-8f-05
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-8f-06
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-8f-07
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-8f-08
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-96-01
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-97-02
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-97-05
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-9a-03
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-9a-04
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-9c-00
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-9e-09
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-9e-0a
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-9e-0b
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-9e-0c
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-9e-0d
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-a5-02
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-a5-03
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-a5-05
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-a6-00
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-a6-01
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-a7-01
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-b7-01
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-ba-02
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-ba-03
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-bf-02
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/06-bf-05
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/0f-00-07
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/0f-00-0a
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/0f-01-02
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/0f-02-04
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/0f-02-05
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/0f-02-06
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/0f-02-07
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/0f-02-09
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/0f-03-02
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/0f-03-03
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/0f-03-04
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/0f-04-01
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/0f-04-03
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/0f-04-04
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/0f-04-07
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/0f-04-08
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/0f-04-09
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/0f-04-0a
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/0f-06-02
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/0f-06-04
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/0f-06-05
/usr/share/microcode_ctl/ucode_with_caveats/intel/intel-ucode/0f-06-08
/usr/share/microcode_ctl/ucode_with_caveats/intel/readme


گزارش تغییرات

تاریخ آخرین تغییر جزئیات
2023-02-15

Update Intel CPU microcode to microcode-20230214 release, addresses
2022-21216, CVE-2022-33196, CVE-2022-33972, CVE-2022-38090 (#2171238,
Addition of 06-6c-01/0x10 (ICL-D B0) microcode at revision 0x1000211;
Addition of 06-8f-04/0x87 (SPR-SP E0/S1) microcode at revision
Addition of 06-8f-04/0x10 microcode at revision 0x2c000170;
Addition of 06-8f-05/0x87 (SPR-SP E2) microcode (in
ucode/06-8f-04) at revision 0x2b000181;
Addition of 06-8f-05/0x10 (SPR-HBM B1) microcode (in
ucode/06-8f-04) at revision 0x2c000170;
Addition of 06-8f-06/0x87 (SPR-SP E3) microcode (in
ucode/06-8f-04) at revision 0x2b000181;
Addition of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-04) at
Addition of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in
ucode/06-8f-04) at revision 0x2b000181;
Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in
ucode/06-8f-04) at revision 0x2b000181;
Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in
ucode/06-8f-04) at revision 0x2c000170;
Addition of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
ucode/06-8f-05) at revision 0x2b000181;
Addition of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-05) at
Addition of 06-8f-05/0x87 (SPR-SP E2) microcode at revision
Addition of 06-8f-05/0x10 (SPR-HBM B1) microcode at revision
Addition of 06-8f-06/0x87 (SPR-SP E3) microcode (in
ucode/06-8f-05) at revision 0x2b000181;
Addition of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-05) at
Addition of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in
ucode/06-8f-05) at revision 0x2b000181;
Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in
ucode/06-8f-05) at revision 0x2b000181;
Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in
ucode/06-8f-05) at revision 0x2c000170;
Addition of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
ucode/06-8f-06) at revision 0x2b000181;
Addition of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-06) at
Addition of 06-8f-05/0x87 (SPR-SP E2) microcode (in
ucode/06-8f-06) at revision 0x2b000181;
Addition of 06-8f-05/0x10 (SPR-HBM B1) microcode (in
ucode/06-8f-06) at revision 0x2c000170;
Addition of 06-8f-06/0x87 (SPR-SP E3) microcode at revision
Addition of 06-8f-06/0x10 microcode at revision 0x2c000170;
Addition of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in
ucode/06-8f-06) at revision 0x2b000181;
Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in
ucode/06-8f-06) at revision 0x2b000181;
Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode (in
ucode/06-8f-06) at revision 0x2c000170;
Addition of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
ucode/06-8f-07) at revision 0x2b000181;
Addition of 06-8f-05/0x87 (SPR-SP E2) microcode (in
ucode/06-8f-07) at revision 0x2b000181;
Addition of 06-8f-06/0x87 (SPR-SP E3) microcode (in
ucode/06-8f-07) at revision 0x2b000181;
Addition of 06-8f-07/0x87 (SPR-SP E4/S2) microcode at revision
Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode (in
ucode/06-8f-07) at revision 0x2b000181;
Addition of 06-8f-04/0x87 (SPR-SP E0/S1) microcode (in
ucode/06-8f-08) at revision 0x2b000181;
Addition of 06-8f-04/0x10 microcode (in intel-ucode/06-8f-08) at
Addition of 06-8f-05/0x87 (SPR-SP E2) microcode (in
ucode/06-8f-08) at revision 0x2b000181;
Addition of 06-8f-05/0x10 (SPR-HBM B1) microcode (in
ucode/06-8f-08) at revision 0x2c000170;
Addition of 06-8f-06/0x87 (SPR-SP E3) microcode (in
ucode/06-8f-08) at revision 0x2b000181;
Addition of 06-8f-06/0x10 microcode (in intel-ucode/06-8f-08) at
Addition of 06-8f-07/0x87 (SPR-SP E4/S2) microcode (in
ucode/06-8f-08) at revision 0x2b000181;
Addition of 06-8f-08/0x87 (SPR-SP E5/S3) microcode at revision
Addition of 06-8f-08/0x10 (SPR-HBM B3) microcode at revision
Addition of 06-b7-01/0x32 (RPL-S S0) microcode at revision 0x112;
Addition of 06-ba-02/0xc0 microcode at revision 0x410e;
Addition of 06-ba-03/0xc0 microcode (in intel-ucode/06-ba-02) at
Addition of 06-ba-02/0xc0 microcode (in intel-ucode/06-ba-03) at
Addition of 06-ba-03/0xc0 microcode at revision 0x410e;
Update of 06-8c-01/0x80 (TGL-UP3/UP4 B1) microcode (in
06-8c-01/intel-ucode/06-8c-01) from revision 0xa4 up to 0xa6;
Update of 06-8e-0c/0x94 (AML-Y 4+2 V0, CML-U 4+2 V0, WHL-U V0)
06-8e-9e-0x-dell/intel-ucode/06-8e-0c) from
Update of 06-9e-0d/0x22 (CFL-H/S/Xeon E R0) microcode (in
06-8e-9e-0x-dell/intel-ucode/06-9e-0d) from revision 0xf0 up
Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x100015e
Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision 0x4003302
Update of 06-55-07/0xbf (CLX-SP/W/X B1/L1) microcode from revision
Update of 06-55-0b/0xbf (CPX-SP A1) microcode from revision 0x7002501
Update of 06-6a-06/0x87 (ICX-SP D0) microcode from revision 0xd000375
Update of 06-7a-01/0x01 (GLK B0) microcode from revision 0x3c up
Update of 06-7a-08/0x01 (GLK-R R0) microcode from revision 0x20 up
Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0xb2
Update of 06-8a-01/0x10 (LKF B2/B3) microcode from revision 0x31 up
Update of 06-8d-01/0xc2 (TGL-H R0) microcode from revision 0x40 up
Update of 06-96-01/0x01 (EHL B1) microcode from revision 0x16 up
Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode from revision
Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in
ucode/06-97-02) from revision 0x22 up to 0x2c (old pf 0x3);
Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-97-02)
Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-97-02)
Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in
ucode/06-97-05) from revision 0x22 up to 0x2c (old pf 0x3);
Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode from revision 0x22
Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-97-05)
Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-97-05)
Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode from revision
Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode (in
ucode/06-9a-03) from revision 0x421 up to 0x429;
Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in
ucode/06-9a-04) from revision 0x421 up to 0x429;
Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode from revision 0x421
Update of 06-9c-00/0x01 (JSL A0/A1) microcode from revision 0x24000023
Update of 06-a5-02/0x20 (CML-H R1) microcode from revision 0xf0 up
Update of 06-a5-03/0x22 (CML-S 6+2 G1) microcode from revision 0xf0
Update of 06-a5-05/0x22 (CML-S 10+2 Q0) microcode from revision 0xf0
Update of 06-a6-00/0x80 (CML-U 6+2 A0) microcode from revision 0xf0
Update of 06-a6-01/0x80 (CML-U 6+2 v2 K1) microcode from revision
Update of 06-a7-01/0x02 (RKL-S B0) microcode from revision 0x54 up
Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in
ucode/06-bf-02) from revision 0x22 up to 0x2c (old pf 0x3);
Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in
ucode/06-bf-02) from revision 0x22 up to 0x2c (old pf 0x3);
Update of 06-bf-02/0x07 (ADL C0) microcode from revision 0x22 up to
Update of 06-bf-05/0x07 (ADL C0) microcode (in intel-ucode/06-bf-02)
Update of 06-97-02/0x07 (ADL-HX/S 8+8 C0) microcode (in
ucode/06-bf-05) from revision 0x22 up to 0x2c (old pf 0x3);
Update of 06-97-05/0x07 (ADL-S 6+0 K0) microcode (in
ucode/06-bf-05) from revision 0x22 up to 0x2c (old pf 0x3);
Update of 06-bf-02/0x07 (ADL C0) microcode (in intel-ucode/06-bf-05)
Update of 06-bf-05/0x07 (ADL C0) microcode from revision 0x22 up to
Change the logger severity level to warning to align with the kmsg one.

2022-08-09

Update Intel CPU microcode to microcode-20220510 release, addresses
2022-21233 (#2119080):
Update of 06-55-04/0xb7 (SKX-D/SP/W/X H0/M0/M1/U0) microcode (in
06-55-04/intel-ucode/06-55-04) from revision 0x2006d05 up
Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x100015d
Update of 06-6a-06/0x87 (ICX-SP D0) microcode from revision 0xd000363
Update of 06-7a-01/0x01 (GLK B0) microcode from revision 0x3a up
Update of 06-7a-08/0x01 (GLK-R R0) microcode from revision 0x1e up
Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0xb0
Update of 06-8c-02/0xc2 (TGL-R C0) microcode from revision 0x26 up
Update of 06-8d-01/0xc2 (TGL-H R0) microcode from revision 0x3e up
Update of 06-97-02/0x03 (ADL-HX/S 8+8 C0) microcode from revision
Update of 06-97-05/0x03 (ADL-S 6+0 K0) microcode (in
ucode/06-97-02) from revision 0x1f up to 0x22;
Update of 06-bf-02/0x03 (ADL C0) microcode (in intel-ucode/06-97-02)
Update of 06-bf-05/0x03 (ADL C0) microcode (in intel-ucode/06-97-02)
Update of 06-97-02/0x03 (ADL-HX/S 8+8 C0) microcode (in
ucode/06-97-05) from revision 0x1f up to 0x22;
Update of 06-97-05/0x03 (ADL-S 6+0 K0) microcode from revision 0x1f
Update of 06-bf-02/0x03 (ADL C0) microcode (in intel-ucode/06-97-05)
Update of 06-bf-05/0x03 (ADL C0) microcode (in intel-ucode/06-97-05)
Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode from revision
Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode (in
ucode/06-9a-03) from revision 0x41c up to 0x421;
Update of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in
ucode/06-9a-04) from revision 0x41c up to 0x421;
Update of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode from revision 0x41c
Update of 06-a7-01/0x02 (RKL-S B0) microcode from revision 0x53 up
Update of 06-97-02/0x03 (ADL-HX/S 8+8 C0) microcode (in
ucode/06-bf-02) from revision 0x1f up to 0x22;
Update of 06-97-05/0x03 (ADL-S 6+0 K0) microcode (in
ucode/06-bf-02) from revision 0x1f up to 0x22;
Update of 06-bf-02/0x03 (ADL C0) microcode from revision 0x1f up
Update of 06-bf-05/0x03 (ADL C0) microcode (in intel-ucode/06-bf-02)
Update of 06-97-02/0x03 (ADL-HX/S 8+8 C0) microcode (in
ucode/06-bf-05) from revision 0x1f up to 0x22;
Update of 06-97-05/0x03 (ADL-S 6+0 K0) microcode (in
ucode/06-bf-05) from revision 0x1f up to 0x22;
Update of 06-bf-02/0x03 (ADL C0) microcode (in intel-ucode/06-bf-05)
Update of 06-bf-05/0x03 (ADL C0) microcode from revision 0x1f up

2022-05-10

Update Intel CPU microcode to microcode-20220510 release, addresses
2022-0005, CVE-2022-21131, CVE-2022-21136, CVE-2022-21151 (#2090246,
Addition of 06-97-02/0x03 (ADL-HX C0) microcode at revision 0x1f;
Addition of 06-97-05/0x03 (ADL-S 6+0 K0) microcode (in
ucode/06-97-02) at revision 0x1f;
Addition of 06-bf-02/0x03 (ADL C0) microcode (in intel-ucode/06-97-02)
Addition of 06-bf-05/0x03 (ADL C0) microcode (in intel-ucode/06-97-02)
Addition of 06-97-02/0x03 (ADL-HX C0) microcode (in
ucode/06-97-05) at revision 0x1f;
Addition of 06-97-05/0x03 (ADL-S 6+0 K0) microcode at revision 0x1f;
Addition of 06-bf-02/0x03 (ADL C0) microcode (in intel-ucode/06-97-05)
Addition of 06-bf-05/0x03 (ADL C0) microcode (in intel-ucode/06-97-05)
Addition of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode at
Addition of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode (in
ucode/06-9a-03) at revision 0x41c;
Addition of 06-9a-03/0x80 (ADL-P 6+8/U 9W L0/R0) microcode (in
ucode/06-9a-04) at revision 0x41c;
Addition of 06-9a-04/0x80 (ADL-P 2+8 R0) microcode at revision 0x41c;
Addition of 06-97-02/0x03 (ADL-HX C0) microcode (in
ucode/06-bf-02) at revision 0x1f;
Addition of 06-97-05/0x03 (ADL-S 6+0 K0) microcode (in
ucode/06-bf-02) at revision 0x1f;
Addition of 06-bf-02/0x03 (ADL C0) microcode at revision 0x1f;
Addition of 06-bf-05/0x03 (ADL C0) microcode (in intel-ucode/06-bf-02)
Addition of 06-97-02/0x03 (ADL-HX C0) microcode (in
ucode/06-bf-05) at revision 0x1f;
Addition of 06-97-05/0x03 (ADL-S 6+0 K0) microcode (in
ucode/06-bf-05) at revision 0x1f;
Addition of 06-bf-02/0x03 (ADL C0) microcode (in intel-ucode/06-bf-05)
Addition of 06-bf-05/0x03 (ADL C0) microcode at revision 0x1f;
Update of 06-4e-03/0xc0 (SKL-U/U 2+3e/Y D0/K1) microcode (in
06-4e-03/intel-ucode/06-4e-03) from revision 0xec up to 0xf0;
Update of 06-55-04/0xb7 (SKX-D/SP/W/X H0/M0/M1/U0) microcode (in
06-55-04/intel-ucode/06-55-04) from revision 0x2006c0a up
Update of 06-5e-03/0x36 (SKL-H/S/Xeon E3 N0/R0/S0) microcode (in
06-5e-03/intel-ucode/06-5e-03) from revision 0xec up to 0xf0;
Update of 06-8c-01/0x80 (TGL-UP3/UP4 B1) microcode (in
06-8c-01/intel-ucode/06-8c-01) from revision 0x9a up to 0xa4;
Update of 06-8e-09/0x10 (AML-Y 2+2 H0) microcode (in
06-8e-9e-0x-dell/intel-ucode/06-8e-09) from revision 0xec up
Update of 06-8e-09/0xc0 (KBL-U/U 2+3e/Y H0/J1) microcode (in
06-8e-9e-0x-dell/intel-ucode/06-8e-09) from revision 0xec up
Update of 06-8e-0a/0xc0 (CFL-U 4+3e D0, KBL-R Y0) microcode (in
06-8e-9e-0x-dell/intel-ucode/06-8e-0a) from revision 0xec up
Update of 06-8e-0b/0xd0 (WHL-U W0) microcode (in
06-8e-9e-0x-dell/intel-ucode/06-8e-0b) from revision 0xec up
Update of 06-8e-0c/0x94 (AML-Y 4+2 V0, CML-U 4+2 V0, WHL-U V0)
06-8e-9e-0x-dell/intel-ucode/06-8e-0c) from
Update of 06-9e-09/0x2a (KBL-G/H/S/X/Xeon E3 B0) microcode (in
06-8e-9e-0x-dell/intel-ucode/06-9e-09) from revision 0xec up
Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E U0) microcode (in
06-8e-9e-0x-dell/intel-ucode/06-9e-0a) from revision 0xec up
Update of 06-9e-0b/0x02 (CFL-E/H/S B0) microcode (in
06-8e-9e-0x-dell/intel-ucode/06-9e-0b) from revision 0xec up
Update of 06-9e-0c/0x22 (CFL-H/S/Xeon E P0) microcode (in
06-8e-9e-0x-dell/intel-ucode/06-9e-0c) from revision 0xec up
Update of 06-9e-0d/0x22 (CFL-H/S/Xeon E R0) microcode (in
06-8e-9e-0x-dell/intel-ucode/06-9e-0d) from revision 0xec up
Update of 06-37-09/0x0f (VLV D0) microcode from revision 0x90c up
Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x100015c
Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision 0x400320a
Update of 06-55-07/0xbf (CLX-SP/W/X B1/L1) microcode from revision
Update of 06-55-0b/0xbf (CPX-SP A1) microcode from revision 0x7002402
Update of 06-5c-09/0x03 (APL D0) microcode from revision 0x46 up
Update of 06-5c-0a/0x03 (APL B1/F1) microcode from revision 0x24 up
Update of 06-5f-01/0x01 (DNV B0) microcode from revision 0x36 up
Update of 06-6a-06/0x87 (ICX-SP D0) microcode from revision 0xd000331
Update of 06-7a-01/0x01 (GLK B0) microcode from revision 0x38 up
Update of 06-7a-08/0x01 (GLK-R R0) microcode from revision 0x1c up
Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0xa8
Update of 06-8a-01/0x10 (LKF B2/B3) microcode from revision 0x2d up
Update of 06-8c-02/0xc2 (TGL-R C0) microcode from revision 0x22 up
Update of 06-8d-01/0xc2 (TGL-H R0) microcode from revision 0x3c up
Update of 06-96-01/0x01 (EHL B1) microcode from revision 0x15 up
Update of 06-9c-00/0x01 (JSL A0/A1) microcode from revision 0x2400001f
Update of 06-a5-02/0x20 (CML-H R1) microcode from revision 0xec up
Update of 06-a5-03/0x22 (CML-S 6+2 G1) microcode from revision 0xec
Update of 06-a5-05/0x22 (CML-S 10+2 Q0) microcode from revision 0xee
Update of 06-a6-00/0x80 (CML-U 6+2 A0) microcode from revision 0xea
Update of 06-a6-01/0x80 (CML-U 6+2 v2 K1) microcode from revision
Update of 06-a7-01/0x02 (RKL-S B0) microcode from revision 0x50 up

2022-02-10

Update Intel CPU microcode to microcode-20220207 release:
Fixes in releasenote.md file.

2022-02-07

Update Intel CPU microcode to microcode-20220204 release, addresses
2021-0127, CVE-2021-0145, CVE-2021-33120 (#2051547, #2049549, #2049566):
Removal of 06-86-04/0x01 (SNR B0) microcode at revision 0xb00000f;
Removal of 06-86-05/0x01 (SNR B1) microcode (in intel-ucode/06-86-04)
Removal of 06-86-04/0x01 (SNR B0) microcode (in intel-ucode/06-86-05)
Removal of 06-86-05/0x01 (SNR B1) microcode at revision 0xb00000f;
Update of 06-4e-03/0xc0 (SKL-U/U 2+3e/Y D0/K1) microcode (in
06-4e-03/intel-ucode/06-4e-03) from revision 0xea up to 0xec;
Update of 06-4f-01/0xef (BDX-E/EP/EX/ML B0/M0/R0) microcode (in
06-4f-01/intel-ucode/06-4f-01) from revision 0xb00003e up
Update of 06-55-04/0xb7 (SKX-D/SP/W/X H0/M0/M1/U0) microcode (in
06-55-04/intel-ucode/06-55-04) from revision 0x2006b06 up
Update of 06-5e-03/0x36 (SKL-H/S/Xeon E3 N0/R0/S0) microcode (in
06-5e-03/intel-ucode/06-5e-03) from revision 0xea up to 0xec;
Update of 06-8c-01/0x80 (TGL-UP3/UP4 B1) microcode (in
06-8c-01/intel-ucode/06-8c-01) from revision 0x88 up to 0x9a;
Update of 06-3f-02/0x6f (HSX-E/EN/EP/EP 4S C0/C1/M1/R2) microcode
Update of 06-3f-04/0x80 (HSX-EX E0) microcode from revision 0x19 up
Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x100015b
Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision 0x4003102
Update of 06-55-07/0xbf (CLX-SP/W/X B1/L1) microcode from revision
Update of 06-55-0b/0xbf (CPX-SP A1) microcode from revision 0x7002302
Update of 06-56-03/0x10 (BDX-DE V2/V3) microcode from revision
Update of 06-56-04/0x10 (BDX-DE Y0) microcode from revision 0xf000019
Update of 06-56-05/0x10 (BDX-NS A0/A1, HWL A1) microcode from revision
Update of 06-5c-09/0x03 (APL D0) microcode from revision 0x44 up
Update of 06-5c-0a/0x03 (APL B1/F1) microcode from revision 0x20 up
Update of 06-5f-01/0x01 (DNV B0) microcode from revision 0x34 up
Update of 06-6a-06/0x87 (ICX-SP D0) microcode from revision 0xd0002a0
Update of 06-7a-01/0x01 (GLK B0) microcode from revision 0x36 up
Update of 06-7a-08/0x01 (GLK-R R0) microcode from revision 0x1a up
Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0xa6
Update of 06-8a-01/0x10 (LKF B2/B3) microcode from revision 0x2a up
Update of 06-8c-02/0xc2 (TGL-R C0) microcode from revision 0x16 up
Update of 06-8d-01/0xc2 (TGL-H R0) microcode from revision 0x2c up
Update of 06-8e-09/0x10 (AML-Y 2+2 H0) microcode from revision 0xea
Update of 06-8e-09/0xc0 (KBL-U/U 2+3e/Y H0/J1) microcode from revision
Update of 06-8e-0a/0xc0 (CFL-U 4+3e D0, KBL-R Y0) microcode from
Update of 06-8e-0b/0xd0 (WHL-U W0) microcode from revision 0xea up
Update of 06-8e-0c/0x94 (AML-Y 4+2 V0, CML-U 4+2 V0, WHL-U V0)
Update of 06-96-01/0x01 (EHL B1) microcode from revision 0x11 up
Update of 06-9c-00/0x01 (JSL A0/A1) microcode from revision 0x1d up
Update of 06-9e-09/0x2a (KBL-G/H/S/X/Xeon E3 B0) microcode from
Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E U0) microcode from revision
Update of 06-9e-0b/0x02 (CFL-E/H/S B0) microcode from revision 0xea
Update of 06-9e-0c/0x22 (CFL-H/S/Xeon E P0) microcode from revision
Update of 06-9e-0d/0x22 (CFL-H/S/Xeon E R0) microcode from revision
Update of 06-a5-02/0x20 (CML-H R1) microcode from revision 0xea up
Update of 06-a5-03/0x22 (CML-S 6+2 G1) microcode from revision 0xea
Update of 06-a5-05/0x22 (CML-S 10+2 Q0) microcode from revision 0xec
Update of 06-a6-00/0x80 (CML-U 6+2 A0) microcode from revision 0xe8
Update of 06-a6-01/0x80 (CML-U 6+2 v2 K1) microcode from revision
Update of 06-a7-01/0x02 (RKL-S B0) microcode from revision 0x40 up

2021-07-23

Update Intel CPU microcode to microcode-20210608 release:
Fixes in releasenote.md file.

2021-07-23

Make intel-06-2d-07, intel-06-4e-03, intel-06-4f-01, intel-06-55-04,
06-5e-03, intel-06-8c-01, intel-06-8e-9e-0x-0xca,
06-8e-9e-0x-dell caveats dependent on intel caveat.
Enable 06-8c-01 microcode update by default.
Enable 06-5e-03 microcode update by default (#1897684).

2021-05-27

Update Intel CPU microcode to microcode-20210525 release, addresses
2020-24489, CVE-2020-24511, CVE-2020-24512, and CVE-2020-24513
Addition of 06-55-05/0xb7 (CLX-SP A0) microcode at revision 0x3000010;
Addition of 06-6a-05/0x87 (ICX-SP C0) microcode at revision 0xc0002f0;
Addition of 06-6a-06/0x87 (ICX-SP D0) microcode at revision 0xd0002a0;
Addition of 06-86-04/0x01 (SNR B0) microcode at revision 0xb00000f;
Addition of 06-86-05/0x01 (SNR B1) microcode (in intel-ucode/06-86-04)
Addition of 06-86-04/0x01 (SNR B0) microcode (in intel-ucode/06-86-05)
Addition of 06-86-05/0x01 (SNR B1) microcode at revision 0xb00000f;
Addition of 06-8c-02/0xc2 (TGL-R C0) microcode at revision 0x16;
Addition of 06-8d-01/0xc2 (TGL-H R0) microcode at revision 0x2c;
Addition of 06-96-01/0x01 (EHL B1) microcode at revision 0x11;
Addition of 06-9c-00/0x01 (JSL A0/A1) microcode at revision 0x1d;
Addition of 06-a7-01/0x02 (RKL-S B0) microcode at revision 0x40;
Update of 06-4e-03/0xc0 (SKL-U/U 2+3e/Y D0/K1) microcode (in
06-4e-03/intel-ucode/06-4e-03) from revision 0xe2 up to 0xea;
Update of 06-4f-01/0xef (BDX-E/EP/EX/ML B0/M0/R0) microcode (in
06-4f-01/intel-ucode/06-4f-01) from revision 0xb000038 up
Update of 06-55-04/0xb7 (SKX-D/SP/W/X H0/M0/M1/U0) microcode (in
06-55-04/intel-ucode/06-55-04) from revision 0x2006a0a up
Update of 06-5e-03/0x36 (SKL-H/S/Xeon E3 N0/R0/S0) microcode (in
06-5e-03/intel-ucode/06-5e-03) from revision 0xe2 up to 0xea;
Update of 06-8c-01/0x80 (TGL-UP3/UP4 B1) microcode (in
06-8c-01/intel-ucode/06-8c-01) from revision 0x68 up to 0x88;
Update of 06-8e-09/0x10 (AML-Y 2+2 H0) microcode (in
06-8e-9e-0x-dell/intel-ucode/06-8e-09) from revision 0xde up
Update of 06-8e-09/0xc0 (KBL-U/U 2+3e/Y H0/J1) microcode (in
06-8e-9e-0x-dell/intel-ucode/06-8e-09) from revision 0xde up
Update of 06-8e-0a/0xc0 (CFL-U 4+3e D0, KBL-R Y0) microcode (in
06-8e-9e-0x-dell/intel-ucode/06-8e-0a) from revision 0xe0 up
Update of 06-8e-0b/0xd0 (WHL-U W0) microcode (in
06-8e-9e-0x-dell/intel-ucode/06-8e-0b) from revision 0xde up
Update of 06-8e-0c/0x94 (AML-Y 4+2 V0, CML-U 4+2 V0, WHL-U V0)
06-8e-9e-0x-dell/intel-ucode/06-8e-0c) from
Update of 06-9e-09/0x2a (KBL-G/H/S/X/Xeon E3 B0) microcode (in
06-8e-9e-0x-dell/intel-ucode/06-9e-09) from revision 0xde up
Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E U0) microcode (in
06-8e-9e-0x-dell/intel-ucode/06-9e-0a) from revision 0xde up
Update of 06-9e-0b/0x02 (CFL-E/H/S B0) microcode (in
06-8e-9e-0x-dell/intel-ucode/06-9e-0b) from revision 0xde up
Update of 06-9e-0c/0x22 (CFL-H/S/Xeon E P0) microcode (in
06-8e-9e-0x-dell/intel-ucode/06-9e-0c) from revision 0xde up
Update of 06-9e-0d/0x22 (CFL-H/S/Xeon E R0) microcode (in
06-8e-9e-0x-dell/intel-ucode/06-9e-0d) from revision 0xde up
Update of 06-3f-02/0x6f (HSX-E/EN/EP/EP 4S C0/C1/M1/R2) microcode
Update of 06-3f-04/0x80 (HSX-EX E0) microcode from revision 0x16 up
Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x1000159
Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision 0x4003006
Update of 06-55-07/0xbf (CLX-SP/W/X B1/L1) microcode from revision
Update of 06-55-0b/0xbf (CPX-SP A1) microcode from revision 0x700001e
Update of 06-56-03/0x10 (BDX-DE V2/V3) microcode from revision
Update of 06-56-04/0x10 (BDX-DE Y0) microcode from revision 0xf000017
Update of 06-56-05/0x10 (BDX-NS A0/A1, HWL A1) microcode from revision
Update of 06-5c-09/0x03 (APL D0) microcode from revision 0x40 up
Update of 06-5c-0a/0x03 (APL B1/F1) microcode from revision 0x1e up
Update of 06-5f-01/0x01 (DNV B0) microcode from revision 0x2e up
Update of 06-7a-01/0x01 (GLK B0) microcode from revision 0x34 up
Update of 06-7a-08/0x01 (GLK-R R0) microcode from revision 0x18 up
Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0xa0
Update of 06-8a-01/0x10 (LKF B2/B3) microcode from revision 0x28 up
Update of 06-a5-02/0x20 (CML-H R1) microcode from revision 0xe0 up
Update of 06-a5-03/0x22 (CML-S 6+2 G1) microcode from revision 0xe0
Update of 06-a5-05/0x22 (CML-S 10+2 Q0) microcode from revision 0xe0
Update of 06-a6-00/0x80 (CML-U 6+2 A0) microcode from revision 0xe0
Update of 06-a6-01/0x80 (CML-U 6+2 v2 K0) microcode from revision

2021-02-17

Update Intel CPU microcode to microcode-20210216 release (#1905111):
Update of 06-55-04/0xb7 (SKX-D/SP/W/X H0/M0/M1/U0) microcode (in
06-55-04/intel-ucode/06-55-04) from revision 0x2006a08 up
Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision 0x4003003
Update of 06-55-07/0xbf (CLX-SP/W/X B1/L1) microcode from revision

2021-02-17

Remove 06-55-04/06-55-06/06-55-07 (SKX-SP/CLX-SP) microcode-20201110 caveats.

2021-02-11

Backport check_dmi_val to check_caveats from RHEL 8.

2020-12-11

Do not use "grep -q" in a pipe in check_caveats.
Add 06-55-04/06-55-06/06-55-07 (SKX-SP/CLX-SP) microcode-20201110 caveats

2020-11-13

Update Intel CPU microcode to microcode-20201112 release:
Addition of 06-8a-01/0x10 (LKF B2/B3) microcode at revision 0x28;
Update of 06-7a-01/0x01 (GLK B0) microcode from revision 0x32 up
Updated releasenote file.

2020-11-13

Disable 06-8c-01 (TGL-UP3/UP4 B1) microcode update by default.

2020-10-30

Update Intel CPU microcode to microcode-20201027 release, addresses
2020-8694, CVE-2020-8695, CVE-2020-8696, CVE-2020-8698
Addition of 06-55-0b/0xbf (CPX-SP A1) microcode at revision 0x700001e;
Addition of 06-8c-01/0x80 (TGL-UP3/UP4 B1) microcode at revision 0x68;
Addition of 06-a5-02/0x20 (CML-H R1) microcode at revision 0xe0;
Addition of 06-a5-03/0x22 (CML-S 6+2 G1) microcode at revision 0xe0;
Addition of 06-a5-05/0x22 (CML-S 10+2 Q0) microcode at revision 0xe0;
Addition of 06-a6-01/0x80 (CML-U 6+2 v2 K0) microcode at revision
Update of 06-4e-03/0xc0 (SKL-U/U 2+3e/Y D0/K1) microcode (in
06-4e-03/intel-ucode/06-4e-03) from revision 0xdc up to 0xe2;
Update of 06-55-04/0xb7 (SKX-D/SP/W/X H0/M0/M1/U0) microcode (in
06-55-04/intel-ucode/06-55-04) from revision 0x2006906 up
Update of 06-5e-03/0x36 (SKL-H/S/Xeon E3 N0/R0/S0) microcode (in
06-5e-03/intel-ucode/06-5e-03) from revision 0xdc up to 0xe2;
Update of 06-8e-09/0x10 (AML-Y 2+2 H0) microcode (in
06-8e-9e-0x-dell/intel-ucode/06-8e-09) from revision 0xd6 up
Update of 06-8e-09/0xc0 (KBL-U/U 2+3e/Y H0/J1) microcode (in
06-8e-9e-0x-dell/intel-ucode/06-8e-09) from revision 0xd6 up
Update of 06-8e-0a/0xc0 (CFL-U 4+3e D0, KBL-R Y0) microcode (in
06-8e-9e-0x-dell/intel-ucode/06-8e-0a) from revision 0xd6 up
Update of 06-8e-0b/0xd0 (WHL-U W0) microcode (in
06-8e-9e-0x-dell/intel-ucode/06-8e-0b) from revision 0xd6 up
Update of 06-8e-0c/0x94 (AML-Y 4+2 V0, CML-U 4+2 V0, WHL-U V0)
06-8e-9e-0x-dell/intel-ucode/06-8e-0c) from
Update of 06-9e-09/0x2a (KBL-G/H/S/X/Xeon E3 B0) microcode (in
06-8e-9e-0x-dell/intel-ucode/06-9e-09) from revision 0xd6 up
Update of 06-9e-0a/0x22 (CFL-H/S/Xeon E U0) microcode (in
06-8e-9e-0x-dell/intel-ucode/06-9e-0a) from revision 0xd6 up
Update of 06-9e-0b/0x02 (CFL-E/H/S B0) microcode (in
06-8e-9e-0x-dell/intel-ucode/06-9e-0b) from revision 0xd6 up
Update of 06-9e-0c/0x22 (CFL-H/S/Xeon E P0) microcode (in
06-8e-9e-0x-dell/intel-ucode/06-9e-0c) from revision 0xd6 up
Update of 06-9e-0d/0x22 (CFL-H/S/Xeon E R0) microcode (in
06-8e-9e-0x-dell/intel-ucode/06-9e-0d) from revision 0xd6 up
Update of 06-3f-02/0x6f (HSX-E/EN/EP/EP 4S C0/C1/M1/R2) microcode
Update of 06-55-03/0x97 (SKX-SP B1) microcode from revision 0x1000157
Update of 06-55-06/0xbf (CLX-SP B0) microcode from revision 0x4002f01
Update of 06-55-07/0xbf (CLX-SP/W/X B1/L1) microcode from revision
Update of 06-5c-09/0x03 (APL D0) microcode from revision 0x38 up
Update of 06-5c-0a/0x03 (APL B1/F1) microcode from revision 0x16 up
Update of 06-7a-08/0x01 (GLK-R R0) microcode from revision 0x16 up
Update of 06-7e-05/0x80 (ICL-U/Y D1) microcode from revision 0x78
Update of 06-a6-00/0x80 (CML-U 6+2 A0) microcode from revision 0xca

2020-10-30

Add README file to the documentation directory.
Add publicly-sourced codenames list to supply to gen_provides.sh; update
Add SUMMARY.intel-ucode file containing metadata information from